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PDF ADP5065 Data sheet ( Hoja de datos )
| Número de pieza | ADP5065 | |
| Descripción | Fast Charge Battery Manager | |
| Fabricantes | Analog Devices | |
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Data Sheet
Fast Charge Battery Manager with Power
Path and USB Compatibility
ADP5065
FEATURES
3 MHz switch mode charger
1.25 A charge current from dedicated charger
Up to 680 mA charging current from 500 mA USB host
Operating input voltage from 4.0 V up to 5.5 V
Tolerant input voltage −0.5 V to +20 V (USB VBUS)
Dead battery isolation FET between battery and
charger output
Battery thermistor input with automatic charger shutdown
for when battery temperature exceeds limits
Compliant with the JEITA Li-Ion battery charging
temperature specification
SYS_EN_OK flag to hold off system turn-on until battery is at
minimum required level for guaranteed system startup
due to minimum battery voltage and/or minimum battery
charge level requirements
EOC programming with C/20, C/10 and specific current level
selection
FUNCTIONAL BLOCK DIAGRAM
AC VBUS VINx
OR
USB
CFILT
ADP5065
SWx
SYSTEM
INDUCTOR
3MHz
BUCK
PGNDx
IIN_EXT
TRK_EXT
SCL
SDA
SYS_ON_OK
CHARGER
CONTROL
BLOCK
ISO_Sx
ISO_Bx
BAT_SNS
THR Li-Ion+
V_WEAK_SET AGND PGNDx
Figure 1.
APPLICATIONS
Digital still cameras
Digital video cameras
Single cell Li-Ion portable equipment
PDA, audio, GPS devices
Mobile phones
GENERAL DESCRIPTION
The ADP5065 charger is fully compliant with the USB 2.0,
USB 3.0, and USB Battery Charging Specification 1.1 and
enables charging via the mini USB VBUS pin from a wall
charger, car charger, or USB host port.
The ADP5065 operates from a 4 V to 5.5 V input voltage range
but is tolerant of voltages of up to 20 V. This alleviates the
concerns about the USB bus spiking during disconnect or
connect scenarios.
The ADP5065 also features an internal FET between the dc-to-
dc charger output and the battery. This permits battery isolation
and, hence, system powering under a dead battery or no battery
scenario, which allows for immediate system function on
connection to a USB power supply.
Based on the type of USB source, which is detected by an external
USB detection chip, the ADP5065 can be set to apply the correct
current limit for optimal charging and USB compliance.
The ADP5065 comes in a very small and low profile 20-lead
WLCSP (0.5 mm pitch spacing) package.
The overall solution requires only five small, low profile external
components consisting of four ceramic capacitors (one of which
is the battery filter capacitor), one multilayer inductor. In addition
to these components, there is one optional dead battery situation
default setting resistor. This configuration enables a very small
PCB area to provide an integrated and performance enhancing
solution to USB battery charging and power rail provision.
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADP5065
Data Sheet
Parameter
BATTERY ISOLATION FET
Bump to Bump Resistance Between
ISO_Bx and ISO_Sx Bumps
Regulated System Voltage
Battery Supplementary Threshold
HIGH VOLTAGE BLOCKING FET
VINx Input
High Voltage Blocking FET On
Resistance
Current, Suspend Mode
Input Voltage
Good Threshold
Rising
Falling
Overvoltage Threshold
Overvoltage Threshold Hysteresis
VINx Transition Timing
Minimum Rise Time for VINx from
5 V to 20 V
Minimum Fall Time for VINx from
4 V to 0 V
THERMAL CONTROL
Isothermal Charging Temperature
Thermal Early Warning Temperature
Thermal Shutdown Temperature
THERMISTOR CONTROL
Thermistor Current
10,000 NTC
100,000 NTC
Thermistor Capacitance
Cold Temperature Threshold
Resistance Thresholds
Cool to Cold Resistance
Cold to Cool Resistance
Hot Temperature Threshold
Resistance Thresholds
Hot to Typical Resistance
Typical to Hot Resistance
JEITA SPECIFICATION4
JEITA Cold Temperature
Resistance Thresholds
Cool to Cold Resistance
Cold to Cool Resistance
JEITA Cool Temperature
Resistance Thresholds
Typical to Cool Resistance
Cool to Typical Resistance
JEITA Typical Temperature
Resistance Thresholds
Warm to Typical Resistance
Typical to Warm Resistance
JEITA Warm Temperature
Resistance Thresholds
Hot to Warm Resistance
Warm to Hot Resistance
JEITA Hot Temperature
Symbol
RDSONISO
Min
Typ
76
VISO_SFC
VTHISO
3.15
0
3.3
5
RDSONHV
ISUSPEND
340
1.3
VVIN_OK_RISE
VVIN_OK_FALL
VVIN_OV
3.78
5.35
tVIN_RISE
tVIN_FALL
10
10
3.9
3.6
5.42
75
TLIM 115
TSDL 130
TSD 140
110
INTC_10k
INTC_100k
CNTC
TNTC_COLD
0
RCOLD_FALL
RCOLD_RISE
TNTC_HOT
24,050
23,100
27,300
26,200
60
RHOT_FALL
RHOT_RISE
2990
2730
3310
3030
TJEITA_COLD
0
RCOLD_FALL
RCOLD_RISE
TJEITA_COOL
24,050
23,100
27,300
26,200
10
RTYP_FALL
RTYP_RISE
TJEITA_TYP
15,200 17,800
14,500 17,000
RWARM_FALL
RWARM_RISE
TJEITA_WARM
4710
4320
5400
4950
45
RHOT_FALL
RHOT_RISE
TJEITA_HOT
2990
2730
3310
3030
60
Max
115
3.45
10
Unit
mΩ
V
mV
Test Conditions/Comments
Includes bump resistances and battery isolation
PMOS on resistance; on battery supplement
mode, VIN = 0 V, VISO_B = 3.6 V, IISO_B = 500 mA
VTRK_DEAD < VBAT_SNS, fast charging CC mode
VISO_S[1:2] < V ,ISO_B[1:2] VSYS rising
455 mΩ IIN = 500 mA
2.5 mA EN_CHG = low
4.0 V
3.67 V
5.5 V
mV
µs
µs
°C
°C
°C TJ rising
°C TJ falling
400
40
100
30,600
29,400
3640
3330
30,600
29,400
μA
μA
pF
°C
Ω
Ω
°C
Ω
Ω
°C
Ω
Ω
°C
20,400
19,500
Ω
Ω
°C
6100
5590
Ω
Ω
°C
3640
3330
Ω
Ω
°C
No battery charging occurs
No battery charging occurs
No battery charging occurs
Battery charging occurs at 50% of
programmed level
Normal battery charging occurs at
default/programmed levels
Battery termination voltage (VTRM) is reduced
by 100 mV
No battery charging occurs
Rev. D | Page 4 of 40
5 Page 
ADP5065
100
95
90
85
80
75
70
2.7 3.0 3.3 3.6 3.9 4.2
BATTERY VOLTAGE (V)
Figure 10. Battery Isolation FET Resistance vs. Battery Voltage, VIN = 5.0 V,
Load Current = 1.0 A
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
12345 6
VIN VOLTAGE (V)
Figure 11. VINx Current vs. VINx Voltage, Suspend Mode (EN_CHG = 0)
Data Sheet
4.4
IISO_B
4.2
VBAT_SNS
0.7
0.6
4.0
IVIN
3.8
0.5
0.4
3.6 0.3
3.4 0.2
3.2 0.1
3.0
0
0
50 100 150
CHARGE TIME (Minutes)
Figure 12. Charge Profile, VIN = 5.0 V, ILIM = 500 mA,
Battery Capacity = 1320 mAh
Rev. D | Page 10 of 40
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADP5065.PDF ] | |
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