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PDF AD5675R Data sheet ( Hoja de datos )
| Número de pieza | AD5675R | |
| Descripción | 12-/16-Bit nanoDAC+ | |
| Fabricantes | Analog Devices | |
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Data Sheet
Octal, 12-/16-Bit nanoDAC+ with
2 ppm/°C Reference, I2C Interface
AD5671R/AD5675R
FEATURES
High performance
High relative accuracy (INL): ±3 LSB maximum at 16 bits
Total unadjusted error (TUE): ±0.14% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.06% of FSR maximum
Low drift 2.5 V reference: 2 ppm/°C typical
Wide operating ranges
−40°C to +125°C temperature range
2.7 V to 5.5 V power supply
Easy implementation
User selectable gain of 1 or 2 (GAIN pin/bit)
1.8 V logic compatibility
400 kHz I2C-compatible serial interface
Robust 2 kV HBM and 1.5 kV FICDM ESD rating
20-lead, RoHS-compliant TSSOP and LFCSP
APPLICATIONS
Optical transceivers
Base station power amplifiers
Process control (PLC input/output cards)
Industrial automation
Data acquisition systems
GENERAL DESCRIPTION
The AD5671R/AD5675R are low power, octal, 12-/16-bit
buffered voltage output digital-to-analog converters (DACs).
They include a 2.5 V, 2 ppm/°C internal reference (enabled by
default) and a gain select pin giving a full-scale output of 2.5 V
(gain = 1) or 5 V (gain = 2). The devices operate from a single
2.7 V to 5.5 V supply and are guaranteed monotonic by design.
The AD5671R/AD5675R are available in a 20-lead TSSOP and in
a 20-lead LFCSP and incorporate a power-on reset circuit and a
RSTSEL pin that ensures the DAC outputs power up to zero scale
or midscale and remain there until a valid write. The AD5671R/
AD5675R contain a power-down mode, reducing the current
consumption to 1 μA typical while in power-down mode.
Table 1. Octal nanoDAC+® Devices
Interface
SPI
I2C
Reference
Internal
External
Internal
16-Bit
AD5676R
AD5676
AD5675R
12-Bit
AD5672R
Not applicable
AD5671R
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL)
AD5671R (12-bit): ±1 LSB maximum
AD5675R (16-bit): ±3 LSB maximum
2. Low Drift, 2.5 V On-Chip Reference
FUNCTIONAL BLOCK DIAGRAM
VLOGIC
VDD
VREFOUT
AD5671R/AD5675R
SCL
SDA
A1
A0
LDAC
RESET
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
2.5V
REF
STRING
DAC 0
BUFFER
STRING
DAC 1
BUFFER
STRING
DAC 2
BUFFER
STRING
DAC 3
BUFFER
STRING
DAC 4
BUFFER
STRING
DAC 5
BUFFER
STRING
DAC 6
BUFFER
STRING
DAC 7
BUFFER
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
POWER-ON
RESET
GAIN POWER-DOWN
×1/×2
LOGIC
RSTSEL
GAIN
GND
Figure 1.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
AD5671R/AD5675R
AD5675R SPECIFICATIONS
VDD = 2.7 V to 5.5 V, 1.8 V ≤ VLOGIC ≤ 5.5 V, RL = 2 kΩ, CL = 200 pF, all specifications TA = −40°C to +125°C, unless otherwise noted.
Table 3.
Parameter
STATIC PERFORMANCE1
Resolution
Relative Accuracy (INL)
Differential Nonlinearity (DNL)
Zero-Code Error
Offset Error
Full-Scale Error
Gain Error
TUE
Offset Error Drift2
DC PSRR2
DC Crosstalk2
OUTPUT CHARACTERISTICS2
Output Voltage Range
Output Current Drive
Capacitive Load Stability
Resistive Load3
Load Regulation
Short-Circuit Current4
Load Impedance at Rails5
Power-Up Time
REFERENCE OUTPUT
Output Voltage6
Reference Temperature Coefficient7, 8
20-Lead TSSOP
20-Lead LFCSP
Output Impedance2
Output Voltage Noise2
Output Voltage Noise Density2
Load Regulation Sourcing2
Load Regulation Sinking2
Output Current Load Capability2
Line Regulation2
A Grade
B Grade
Min Typ Max Min Typ Max Unit
Test Conditions/Comments
16 16 Bits
±1.8 ±8
±1.8 ±3
LSB
Gain = 1
±1.7 ±8
±1.7 ±3
LSB
Gain = 2
±0.7 ±1
±0.7 ±1
LSB
Gain = 1
±0.5 ±1
±0.5 ±1
LSB
Gain = 2
0.8 4
0.8 1.6 mV
Gain = 1 or gain = 2
−0.75 ±6
−0.75 ±2
mV
Gain = 1
−0.1 ±4
−0.1 ±1.5 mV
Gain = 2
−0.018 ±0.28
−0.018 ±0.14 % of FSR Gain = 1
−0.013 ±0.14
−0.013 ±0.07 % of FSR Gain = 2
+0.04 ±0.24
+0.04 ±0.12 % of FSR Gain = 1
−0.02 ±0.12
−0.02 ±0.06 % of FSR Gain = 2
±0.03 ±0.3
±0.03 ±0.18 % of FSR Gain = 1
±0.006 ±0.25
±0.006 ±0.14 % of FSR Gain = 2
±1 ±1 µV/°C
0.25
0.25
mV/V
DAC code = midscale,
VDD = 5 V ± 10%
±2 ±2 µV Due to single channel,
full-scale output change
±3 ±3 µV/mA Due to load current change
±2 ±2 µV Due to powering
down (per channel)
0
2.5 0
2.5 V
Gain = 1
0
50
5V
Gain = 2
15 15 mA
2 2 nF RL = ∞
10 10 nF RL = 1 kΩ
1 1 kΩ
183 183 µV/mA VDD = 5 V ± 10%, DAC code =
midscale, −30 mA ≤ IOUT ≤ +30 mA
177 177 µV/mA VDD = 3 V ± 10%, DAC code =
midscale, −20 mA ≤ IOUT ≤ +20 mA
40 40 mA
25 25 Ω
2.5 2.5 µs Coming out of
power-down mode, VDD = 5 V
2.4975
5
5
0.04
13
240
29
74
±20
43
2.5025 2.4975
20 2
20 2
0.04
13
240
29
74
±20
43
2.5025 V
5 ppm/°C
10 ppm/°C
Ω
µV p-p
nV/√Hz
µV/mA
µV/mA
mA
µV/V
See the Terminology section
0.1 Hz to 10 Hz
At ambient, f = 10 kHz,
CL = 10 nF, gain = 1 or 2
At ambient
At ambient
VDD ≥ 3 V
At ambient
Rev. B | Page 5 of 32
5 Page 
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
10000 20000 30000 40000 50000 60000
CODE
Figure 6. AD5675R INL Error vs. Code
70000
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
500 1000 1500 2000 2500 3000 3500
CODE
Figure 7. AD5671R INL Error vs. Code
4000
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
10000 20000 30000 40000 50000 60000
CODE
Figure 8. AD5675R DNL Error vs. Code
70000
AD5671R/AD5675R
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
0.04
500 1000 1500 2000 2500 3000 3500
CODE
Figure 9. AD5671R DNL Error vs. Code
4000
0.03
0.02
0.01
0
–0.01
–0.02
0
0.04
10000 20000 30000 40000 50000
CODE
Figure 10. AD5675R TUE vs. Code
60000
70000
0.03
0.02
0.01
0
–0.01
–0.02
0
500 1000 1500 2000 2500 3000 3500 4000
CODE
Figure 11. AD5671R TUE vs. Code
Rev. B | Page 11 of 32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD5675R.PDF ] | |
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