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PDF AD5398A Data sheet ( Hoja de datos )
| Número de pieza | AD5398A | |
| Descripción | I2C DAC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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120 mA, Current Sinking,
10-Bit, I2C DAC
AD5398A
FEATURES
Current sink: 120 mA
2-wire, (I2C-compatible) 1.8 V serial interface
10-bit resolution
Integrated current sense resistor
Power supply: 2.7 V to 5.5 V
Guaranteed monotonic over all codes
Power down to: 0.5 μA typical
Internal reference
Ultralow noise preamplifier
Power-down function
Power-on reset
Available in 3 × 3 array WLCSP package
APPLICATIONS
Consumer
Lens autofocus
Image stabilization
Optical zoom
Shutters
Iris/exposure
Neutral density (ND) filters
Lens covers
Camera phones
Digital still cameras
Camera modules
Digital video cameras/camcorders
Camera-enabled devices
Security cameras
Web/PC cameras
Industrial
Heater control
Fan control
Cooler (Peltier) control
Solenoid control
Valve control
Linear actuator control
Light control
Current loop control
GENERAL DESCRIPTION
The AD5398A is a single, 10-bit digital-to-analog converter
(DAC) with a current sink output capability of 120 mA. This
device features an internal reference and operates from a
single 2.7 V to 5.5 V supply. The DAC is controlled via a
2-wire (1.8 V, I2C®-compatible) serial interface that operates
at clock rates up to 400 kHz.
The AD5398A incorporates a power-on reset circuit, which
ensures the DAC output powers up to 0 V and remains there
until a valid write takes place. It has a power-down feature
that reduces the current consumption of the device to 0.5 μA
typically.
The AD5398A is designed for autofocus, image stabilization,
and optical zoom applications in camera phones, digital still
cameras, and camcorders. The AD5398A is also suitable for
many industrial applications, such as controlling temperature,
light, and movement without derating, over temperatures
ranging from −30°C to +85°C. The I2C address range for the
AD5398A is 0x18 to 0x1F inclusive.
FUNCTIONAL BLOCK DIAGRAM
VDD
AD5398A
REFERENCE
SDA
SCL
I2C SERIAL
INTERFACE
10-BIT
CURRENT
OUTPUT DAC
POWER-ON
RESET
VDD
D1
ISINK
PD
R
RSENSE
3.3Ω
DGND
DGND
Figure 1.
AGND
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.1
Table 4.
Parameter
VDD to AGND
VDD to DGND
AGND to DGND
SCL, SDA to DGND
PD to DGND
ISINK to AGND
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature (TJ max)
θJA Thermal Impedance2
Mounted on 2-Layer Board
Mounted on 4-Layer Board
Lead Temperature, Soldering
Maximum Peak Reflow Temperature3
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V
−0.3 V to +0.3 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V
−40°C to +85°C
−65°C to +150°C
150°C
84°C/W
48°C/W
260°C (±5°C)
1 Transient currents of up to 100 mA do not cause SCR latch-up.
2 To achieve the optimum θJA, it is recommended that the AD5398A be
soldered onto a 4-layer board.
3 As per Jedec J-STD-020C.
AD5398A
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
ESD CAUTION
Rev. 0 | Page 5 of 16
5 Page 
AD5398A
DATA FORMAT
Data is written to the AD5398A high byte first, MSB first, and is
shifted into the 16-bit input register. After all data is shifted in,
data from the input register is transferred to the DAC register.
Because the DAC requires only 10 bits of data, not all bits of the
input register data are used. The MSB is reserved for an active-
high, software-controlled, power-down function.
1 91
SCL
The data format is shown in Table 6. When referring to this table,
note that Bit 14 is unused; Bit 13 to Bit 4 correspond to the DAC
data bits, D9 to D0; and Bit 3 to Bit 0 are unused.
During a read operation, data is read in the same bit order.
19
SDA
0
START BY
MASTER
0 0 1 1X
FRAME 1
SERIAL BUS
ADDRESS BYTE
X R/W
PD X D9 D8 D7 D6 D5 D4
D3 D2 D1 D0 X X X X
ACK BY
AD5398 A
FRAME 2
MOST SIGNIFICANT
DATA BYTE
Figure 18. Write Operation
ACK BY
AD5398 A
FRAME 3
LEAST SIGNIFICANT
DATA BYTE
ACK BY STOP BY
AD5398A MASTER
1 91 1
9
SCL
SDA
0
START BY
MASTER
0 0 1 1X
FRAME 1
SERIAL BUS
ADDRESS BYTE
X R/W
PD X D9 D8 D7 D6 D5 D4
D3 D2 D1 D0 X X X
ACK BY
AD5398A
FRAME 2
MOST SIGNIFICANT
DATA BYTE
Figure 19. Read Operation
ACK BY
AD5398A
FRAME 3
LEAST SIGNIFICANT
DATA BYTE
X
ACK BY STOP BY
AD5398A MASTER
Table 6. Data Format
High Byte
Serial Data-
Words
Bit Bit Bit Bit Bit Bit
15 14 13 12 11 10
Serial Data Bits SD7 SD6 SD5 SD4 SD3 SD2
Input Register R15 R14 R13 R12 R11 R10
Function1
PD X
D9 D8 D7 D6
1 PD = soft power-down; X = unused/don’t care; and D7 to D0 = DAC data.
Low Byte
Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit
9876543210
SD1 SD0 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0
R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
D5 D4 D3 D2 D1 D0 X X X X
Rev. 0 | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AD5398A.PDF ] | |
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