|
|
PDF AK4671 Data sheet ( Hoja de datos )
| Número de pieza | AK4671 | |
| Descripción | Stereo CODEC | |
| Fabricantes | AKM | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AK4671 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
[AK4671]
AK4671
Stereo CODEC with MIC/RCV/HP-AMP
GENERAL DESCRIPTION
The AK4671 is a stereo CODEC with a built-in Microphone-Amplifier, Receiver-Amplifier and
Headphone-Amplifier. The AK4671 features dual PCM I/F in addition to audio I/F that allows easy
interfacing in mobile phone designs with Bluetooth I/F. The AK4671 is available in a 57pin BGA, utilizing
less board space than competitive offerings.
FEATURES
1. Recording Function (Stereo CODEC)
• 4 Stereo Input Selector x 2ch
• 4 Stereo Inputs (Single-ended) or 2 Stereo Input (Full-differential)
• MIC Amplifier: +30dB ∼ −12dB, 3dB step
• Digital ALC (Automatic Level Control): +36dB ∼ −54dB, 0.375dB Step, Mute
• Wind-noise Reduction Filter
• Stereo Separation Emphasis
• 5-band Programmable Notch Filter
• Audio Interface Format: 16bit MSB justified, I2S, DSP Mode
2. Playback Function (Stereo CODEC)
• Digital Volume (+12dB ∼ −115.0dB, 0.5dB Step, Mute)
• Digital ALC (Automatic Level Control): +36dB ∼ −54dB, 0.375dB Step, Mute
• Stereo Separation Emphasis
• 5-band EQ
• Stereo Line Output
• Mono Receiver-Amp
- BTL Output
- Output Power: 30mW@32Ω (AVDD=3.3V)
• Stereo Headphone-Amp
- Output Power: 30mW@16Ω (AVDD=3.3V)
• Analog Mixing: 4 Stereo Input
• Audio Interface Format:
- 16bit MSB justified, 16bit LSB justified, 16-24bit I2S, DSP Mode
3. Dual PCM I/F for Baseband & Bluetooth Interface
• Sample Rate Converter (Up sample: up to x6: Down sample: down to x1/6)
• Sample Rate: 8kHz
• Digital Volume
• Audio Interface Format:
- 16bit Linear, 8bit A-law, 8bit μ-law
- Short/Long Frame, I2S, MSB justified
4. 10bit SAR ADC
• 3 Input Selector
5. Power Management
6. Master Clock:
(1) PLL Mode
• Frequencies: 11.2896MHz, 12MHz, 12.288MHz, 13MHz, 13.5MHz, 19.2MHz,
24MHz, 26MHz, 27MHz (MCKI pin)
1fs (LRCK pin)
32fs or 64fs (BICK pin)
(2) External Clock Mode
• Frequencies: 256fs, 384fs, 512fs, 768fs or 1024fs (MCKI pin)
7. Output Master Clock Frequencies: 32fs/64fs/128fs/256fs
8. Sampling Rate (Stereo CODEC):
MS0666-E-02
-1-
2010/06
1 page  
[AK4671]
No. Pin Name
I/O
Function
J8 SDTIA
I Serial Data Input A Pin
G8 BICKA
I/O Serial Data Clock A Pin
H9 SYNCA
I/O Sync Signal A Pin
G9 SDTOA
O Serial Data Output A Pin
F8 TVDD2
- Digital I/O Power Supply 2 Pin, 1.6 ∼ 3.6V
F9 VSS2
- Ground 2 Pin
E8 PVDD
- PLLBT Power Supply Pin, 2.2 ∼ 3.6V
E9 VCOCBT
O
Output Pin for Loop Filter of PLLBT Circuit
This pin should be connected to VSS2 pin with one resistor and capacitor in series.
D8 VCOC
O
Output Pin for Loop Filter of PLL Circuit
This pin should be connected to VSS1 pin with one resistor and capacitor in series.
D9 VCOM
O
Common Voltage Output Pin, 0.5 x AVDD
Bias voltage of ADC inputs and DAC outputs.
C8 MUTET
O
Mute Time Constant Control Pin
Connected to VSS1 pin with a capacitor for mute time constant.
C9 ROUT2
O Rch Headphone-Amp Output Pin
B9 LOUT2
O Lch Headphone-Amp Output Pin
A9 TEST
-
Test Pin
This pin should be open.
A8 AVDD
- Analog Power Supply Pin, 2.2 ∼ 3.6V
B8 VSS1
- Ground 1 Pin
B7 ROUT1
RCN
O Rch Stereo Line Output 1 Pin (RCV bit = “0”: Stereo Line Output)
O Receiver-Amp Negative Output Pin (RCV bit = “1”: Receiver Output)
A7 LOUT1
RCP
O Lch Stereo Line Output 1 Pin (RCV bit = “0”: Stereo Line Output)
O Receiver-Amp Positive Output Pin (RCV bit = “1”: Receiver Output)
A6
ROUT3
LON
O Rch Stereo Line Output 3 Pin (LODIF bit = “0”: Single-ended Stereo Output)
O Negative Line Output Pin (LODIF bit = “1”: Full-differential Mono Output)
B6
LOUT3
LOP
O Lch Stereo Line Output 3 Pin (LODIF bit = “0”: Single-ended Stereo Output)
O Positive Line Output Pin (LODIF bit = “1”: Full-differential Mono Output)
A5
RIN4
IN4−
I Rch Analog Input 4 Pin (MDIF4 bit = “0”: Single-ended Input)
I Negative Line Input 4 Pin (MDIF4 bit = “1”: Full-differential Input)
B5 LIN4
IN4+
I Lch Analog Input 4 Pin (MDIF4 bit = “0”: Single-ended Input)
I Positive Line Input 4 Pin (MDIF4 bit = “1”: Full-differential Input)
B4
RIN3
IN3−
I Rch Analog Input 3 Pin (MDIF3 bit = “0”: Single-ended Input)
I Negative Line Input 3 Pin (MDIF3 bit = “1”: Full-differential Input)
A4
LIN3
IN3+
I Lch Analog Input 3 Pin (MDIF3 bit = “0”: Single-ended Input)
I Positive Line Input 3 Pin (MDIF3 bit = “1”: Full-differential Input)
B3
RIN2
IN2−
I Rch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Negative Line Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
A3 LIN2
IN2+
I Lch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Positive Line Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
B2
RIN1
IN1−
I Rch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Negative Line Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
A2
LIN1
IN1+
I Lch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Positive Line Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
C3 NC
-
No Connect Pin
No internal bonding. This pin should be open or connected to the ground.
Note 1. All input pins except analog input pins (MDT, LIN1/IN1+, RIN1/IN1−, LIN2/IN2+, RIN2/IN2−, LIN3/IN3+,
RIN3/IN3−, LIN4/IN4+, RIN4/IN4−, SAIN1, SAIN2, SAIN3) should not be left floating.
I/O pins except SDA pin (LRCK, BICK, SYNCA, BICKA, SYNCB, BICKB) should be processed appropriately.
Please refer the “Master Mode/Slave Mode” (P.45) and “PCM I/F Master Mode/Slave Mode” (P.105). SDA pin
should be pulled-up by a resistor externally and be connected to (DVDD+0.3)V or less voltage.
MS0666-E-02
-5-
2010/06
5 Page 
[AK4671]
PMVCM = MUTEN bits = “1”, PMPLL = MCKO = PMMP = M/S = PMSRA = PMSRB = PMPCM bits = “0”.
AVDD=13.2mA (typ), PVDD=0mA (typ), DVDD=6.7mA (typ), TVDD2=0mA (typ), TVDD3=0mA (typ),
SAVDD=0.8mA (typ).
Note 26. PLL Master Mode and LP bit = “0”, fs=44.1kHz, PMADL = PMMICL= PMMICR= PMADR = PMDAL =
PMDAR = PMLO1 = PMRO1 = PMLO2 = PMRO2 = PMLO2S = PMRO2S = PMLO3 = PMRO3 =PMSAD =
PMVCM = PMPLL = M/S = PMMP = MUTEN bits = “1”, MCKO = PMSRA = PMSRB = PMPCM bits = “0”,
PLL Reference Clock = MCKI = 11.2896MHz.
AVDD=14.7mA (typ), PVDD=0mA (typ), DVDD=7.0mA (typ), TVDD2=0mA (typ), TVDD3=0mA (typ),
SAVDD=0.8mA (typ).
Note 27. In case of LP bit = “1”, fs=8kHz, EXT Slave Mode and PMVCM = PMMP = PMMICL = PMADL = PMDAR =
RCV = PMLO1 = PMRO1 = PMSRA = PMSRB = PMPCM bits = “1”.
AVDD=5.2mA (typ), PVDD=0.6mA (typ), DVDD=2.2mA (typ), TVDD2=0mA (typ), TVDD3=0mA (typ),
SAVDD=0mA (typ).
Note 28. All digital input pins are fixed to each supply pin (DVDD, TVDD2 or TVDD3) or VSS4.
SRC CHARACTERISTICS
(Ta=25°C; AVDD=PVDD=SAVDD=DVDD=TVDD2=TVDD3=3.3V; VSS1=VSS2=VSS3=VSS4=0V;
Signal Frequency=1kHz; 16bit Data; Measurement frequency=20Hz ∼ 3.4kHz; unless otherwise specified)
Parameter
Symbol min typ max
SRC Characteristics (Down Sampling: SRC-A): SDTI Æ SRC-A Æ SDTOA/SDTOB
Resolution
- - 16
Input Sample Rate
FSI (fs)
8
- 48
Output Sample Rate
FSO (fs2) - 8 -
THD+N (Input = 1kHz, −1dBFS, Note 29)
FSO/FSI = 8kHz/44.1kHz
- −94 -
Dynamic Range (Input = 1kHz, −60dBFS, Note 29)
FSO/FSI = 8kHz/44.1kHz
- 97 -
Ratio between Input and Output Sample Rate
FSO/FSI 1/6
SRC Characteristics (Up Sampling: SRC-B): SDTIA/SDTIB Æ SRC-B Æ SDTO
1
Resolution
- - 16
Input Sample Rate
FSI (fs2)
-
8
-
Output Sample Rate
FSO (fs)
8
- 48
THD+N (Input = 1kHz, −1dBFS, Note 29)
FSO/FSI = 44.1kHz/8kHz
- −95 -
Dynamic Range (Input = 1kHz, −60dBFS, Note 29)
FSO/FSI = 44.1kHz/8kHz
- 100 -
Ratio between Input and Output Sample Rate
FSO/FSI
1
6
Note 29. Measured by Audio Precision System Two Cascade.
Note 30. fs is the sampling frequency for Stereo CODEC. fs2 is for PCM I/F.
Units
Bits
kHz
kHz
dB
dB
-
Bits
kHz
kHz
dB
dB
-
MS0666-E-02
- 11 -
2010/06
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK4671.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AK4671 | Stereo CODEC | AKM |
| AK4673 | Stereo CODEC | AKM |
| AK4675 | Stereo CODEC | AKM |
| AK4678 | Stereo CODEC | AKM |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |