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AAT1149B Schematic ( PDF Datasheet ) - AAT

Teilenummer AAT1149B
Beschreibung 2.2MHz Fast Transient 400mA Step-Down Converter
Hersteller AAT
Logo AAT Logo 




Gesamt 17 Seiten
AAT1149B Datasheet, Funktion
SwitchRegTM
PRODUCT DATASHEET
AAT1149B
2.2MHz Fast Transient 400mA Step-Down Converter
General Description
The AAT1149B SwitchReg is a 2.2MHz step-down con-
verter with an input voltage range of 2.2V to 5.5V. It is
optimized to react quickly to load variations and operate
with a tiny 0603 inductor that is only 1mm tall.
The AAT1149B can deliver 400mA of load current while
maintaining a low 45μA no load quiescent current. The
2.2MHz switching frequency minimizes the size of exter-
nal components while keeping switching losses low.
The AAT1149B maintains high efficiency throughout the
operating range, which is critical for portable applica-
tions.
The AAT1149B is available in a Pb-free, space-saving
5-pin wafer-level chip scale (WLCSP) package and is
rated over the -40°C to +85°C temperature range.
Features
• Ultra-Small 0603 Inductor (Height = 1mm)
• VIN Range: 2.2V to 5.5V
• VOUT Fixed 1.8V
• 400mA Max Output Current
• Up to 98% Efficiency
• 45μA No Load Quiescent Current
• 2.2MHz Switching Frequency
• 70μs Soft Start
• Fast Load Transient
• Over-Temperature Protection
• Current Limit Protection
• 100% Duty Cycle Low-Dropout Operation
• <1μA Shutdown Current
• 0.9x1.2mm WLCSP Package
• Temperature Range: -40°C to +85°C
Applications
• Cellular Phones
• Digital Cameras
• Handheld Instruments
• Microprocessor / DSP Core / IO Power
• PDAs and Handheld Computers
• USB Devices
Typical Application
VIN = 3.6V
C2
4.7µF
U1
AAT1149B
IN LX
EN FB
AGND PGND
PGND PGND
VOUT = 1.8V
L1 2.2µH
C1
4.7µF
1149B.2008.07.1.0
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1






AAT1149B Datasheet, Funktion
SwitchRegTM
PRODUCT DATASHEET
AAT1149B
2.2MHz Fast Transient 400mA Step-Down Converter
Typical Characteristics
Line Regulation
(VOUT = 1.8V)
1
0.8
0.6 400mA
0.4
0.2
0mA
100mA
0
-0.2
-0.4
-0.6 600mA
-0.8
-1
2.5 3 3.5 4 4.5 5 5.5
Input Voltage (V)
6
Line Transient
(VOUT = 1.8V; VIN = 3.6V to 4.2V)
5
4
3
2
1 0.04
0 0.02
0
-0.02
Time (200µs/div)
Line Transient
(VOUT = 1.8V; No Load)
4.50
1.94
4.25
1.92
4.00
1.90
3.75
1.88
3.50
1.86
3.25
1.84
3.00
1.82
2.75
1.80
2.50
1.78
Time (50µs/div)
N-Channel RDS(ON) vs. Input Voltage
(WLCSP-5)
750
700
650
600
550
500
450
400
350
300
250
2.5
120°C
85°C
25°C
3
3.5
4
100°C
4.5 5
5.5
Input Voltage (V)
6
P-Channel RDS(ON) vs. Input Voltage
(WLCSP-5)
750
700
650
120°C
100°C
600
550
500
450 85°C
400
350 25°C
300
250
2.5 3 3.5 4 4.5 5 5.5
Input Voltage (V)
6
Step-Down Converter Load Transient Response
(VIN = 3.6V; VOUT = 1.8V; IOUT = 40mA to 400mA; COUT = 4.7µF)
400mA
0.6
0.4
40mA
0.2
0.0
2.2
2.0
1.8
1.6
1.4
Time (100µs/div)
6
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1149B.2008.07.1.0

6 Page









AAT1149B pdf, datenblatt
SwitchRegTM
PRODUCT DATASHEET
AAT1149B
2.2MHz Fast Transient 400mA Step-Down Converter
For the condition where the step-down converter is in
dropout at 100% duty cycle, the total device dissipation
reduces to:
PTOTAL = IO2 · RDS(ON)H + IQ · VIN
Since RDS(ON), quiescent current, and switching losses all
vary with input voltage, the total losses should be inves-
tigated over the complete input voltage range.
Given the total losses, the maximum junction tempera-
ture can be derived from the θJA for the WLCSP-8 pack-
age which is 284°C/W.
TJ(MAX) = PTOTAL · ΘJA + TAMB
WLCSP Package Light Sensitivity
The electrical performance of the WLCSP package can be
adversely affected by exposing the device to certain light
sources such as direct sunlight or a halogen lamp whose
wavelengths are red and infra-reds. However, fluores-
cent lighting has very little effect on the electrical perfor-
mance of the WLCSP package.
Layout
The suggested PCB layout for the AAT1149B is shown in
Figures 1 and 2. The following guidelines should be used
to help ensure a proper layout.
1. The input capacitor (C2) should connect as closely as
possible to IN (Pin 4) and PGND (Pin 3).
2. C1 and L1 should be connected as closely as possi-
ble. The connection of L1 to the LX pin should be as
short as possible.
3. The feedback trace or FB pin (Pin 1) should be sepa-
rate from any power trace and connect as closely as
possible to the load point. Sensing along a high-
current load trace will degrade DC load regulation.
4. The resistance of the trace from the load return to
the PGND (Pin 3) should be kept to a minimum. This
will help to minimize any error in DC regulation due
to differences in the potential of the internal signal
ground and the power ground.
5. The pad on the PCB for the WLCSP-5 package should
use NSMD (non-solder mask defined) configuration
due to its tighter control on the copper etch process.
A pad thickness of less than 1oz is recommended to
achieve higher stand-off.
12
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1149B.2008.07.1.0

12 Page





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