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Número de pieza | CDM62256 | |
Descripción | CMOS 32768-Word by 8-Bit LSI Static RAM | |
Fabricantes | GE | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de CDM62256 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
No Preview Available ! Random-Access Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDM62256
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TERMINAL ASSIGNMENT
CMOS 32,768-Word by 8-Bit
LSI Static RAM
Features:
• Fully static operation
• Single power supply: 4.5 V to 5.5 V
• All Inputs and outputs directly TTL
compatible
• Industry standard 28-pin
configuration
• Input address buffers gated off
with chip disable
• Low standby and operating power:
10081 = 2 pA typical, 100A = 70 mA
maximum
• 3-state outputs
• Extended operating temperature range
The RCA-CDM62256 is a 32,768-word by 8-blt static
random-Bccess memory. It Is designed for use in memory
systems where high-speed, low power and simplicity in use
are desirable. This device has common data input and data
output and utilizes a single power supply of 4.5 V to 5.5 V.
Chip Enable (CE) gates the address and output buffers and
powers down the chip to the low power standby mode. The
output enable (OE) controls the output buffers to eliminate
bus contention.
The CDM62256-10 has an operating temperature range of
O· to +70·C. The CDM62256-101 and CDM62256-121 have
an operating temperature range of -40· to +85· C.
The CDM62256 Is supplied In 28-lead, hermetic, dual-In-
line, side-brazed ceramiC packages (D suffix), in 28-lead
dual-in-line plastic packages (E suffix), and In chip form (H
suffix).
CDM62256-10
CD M62256-1 01
CDM62256-121
Access Time (max.)
Output Enable Time (max.)
Operating Current (max.)
Standby Current
looe, (max.)
100 ns
50 ns
70 mA
100pA
100 ns
50 ns
70mA
200pA
120 ns
60 ns
70mA
200pA
Operating Temp. Range
O· to +70·C
-40· to +85· C
Data Retention Voltage:
O· :5 TA:5 +7.0· C
2V min.
-
-
O· :5TA:5 +85·C
-
2Vmin.
2V min.
-40· < TA < O·C
- 4.5 V min.
4.5 V min.
RECOMMENDED DC OPERATING CONDITIONS at TA = 0 to +70·C (CDM62256-10); TA = _40· to +85·C (CM62256-10I,
CDM62258-121) For maximum reliability, operating condition••hould be .elected .0 that operation 18 alway. within the
following range.:
CHARACTERISTIC
DC Operating Voltage Range
Input Voltage Range
A Min V,L = -1.0 V for pulse wldth:5 50 ns
MIN.
LIMITS
TYP.
MAX.
UNITS
Voo 4.5
V'H 2.2
V,L -0.3 A
5 5.5
3.5 Voo +0.3
0 0.8
V
File Number 1845
648 ______________________________________________________________
1 page Random-Acce88Memories(RAM~ _________________________________________
CDM62256
TIMING CHARTS
Reid Cycle
~--------------__ tRC------------------~
ADDRESS
DOUT
NOTE' DURING READ CYCLE TIME. W! IS TO BE "H" LEVEL.
92C"-40332
Write Cycle 1 (CE Control)
ADDRESS
~--------------twc----------------~~
~--------~-tAW--------------~
DOUT--~~~_7~~--------------------------------4_--------------~f_~~c_
<D,N ________________________________
tDw---~-tDH
cr,NOTE' DURING WAITE CYCLE TIME THAT IS CONTROLLED BY
OUTPUT BUFFER IS HIGH IMPEDANCE WHETHER !!E LEVEL
IS "H" OR "L".
________________________________________________________________
~2
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet CDM62256.PDF ] |
Número de pieza | Descripción | Fabricantes |
CDM62256 | CMOS 32768-Word by 8-Bit LSI Static RAM | GE |
CDM62256C | High Reliability CMOS 32768 x 8-Bit LSI Static RAM | Harris Semiconductor |
CDM62256C3 | High Reliability CMOS 32768 x 8-Bit LSI Static RAM | Harris Semiconductor |
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