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Teilenummer | CDP1883 |
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Beschreibung | CMOS 7-Bit Latch and Decoder Memory Interfaces | |
Hersteller | GE | |
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Gesamt 5 Seiten CMOS Perlpherals,_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDP1883, CDP1883C
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TOP VIEW
92CS-37283
CDP1883, CDP1883C
TERMINAL ASSIGNMENT
CMOS 7-Bit Latch and Decoder
Memory Interfaces
Features:
• Performs memory address latch and decoder functions multiplexed or
non-multiplexed
• Interfaces directly with the CDP1800-series microprocessors
• Allows decoding for systems up to 32K bytes
The RCA-CDP1883 IS a CMOS 7-blt memory latch and
decoder Circuit Intended for use In CDP1800-series micro-
processor systems It can serve as a direct Interface
between the multiplexed address bus of thiS system and up
to four 8K x 8-blt memories to Implement a 32K-byte
memory system With four 4K x 8-blt memOries, a 16K-byte
system can be decoded
Thedevice is also compatible with non-multiplexed address
bus microprocessors By connecting the clock inputto Vee,
the latches are In the data-following mode and the decoded
outputs can be used In general-purpose memory-system
applications
The CDP1833 IS compatible with CDP1800-series micro-
processors operating at maximum clock frequency.
The CDP1883 and CDP1883C are functionally identical.
They differ in that the CDP1883 has a recommended
operallng voltage range of 4 to 10.5 volts and the C version
has a recommended operating voltage range of 4 to 6.5
volts
The CDP1883 and CDP1883C are supplied in 20-lead, dual-
in-line plastiC packages (E suffix).
MAXIMUM RATINGS, Absolute-Maximum Values:
DC SUPPLY-VOLTAGE RANGE, (VDD)
(Voltage referenced to VSS terminal)
CDP1883........... .. .........................................................................................-05to+11 V
CDP1883C ....................................................................................................-05to+7V
INPUT VOLTAGE RANGE, ALL INPUTS. . ................................................................... -0 5 to VDD +05 V
DC INPUT CURRENT, ANY ONE INPUT ................................................................................ ±10 mA
POWER DISSIPATION PER PACKAGE (PO)
For TA;-40 to +60·C (PACKAGE TYPE E) .. ............................. .. ........................................ 500 mW
For TA;+60 to +85·C (PACKAGE TYPE E) .... ....... . .......... . ..................... Derate Linearly at 12 mW/·C to 200 mW
DEVICE DISSIPATION PER OUTPUT TRANSISTOR
For TA;FULL PACKAGE-TEMPERATURE RANGE ...................................................................... 100 mW
OPERATING-TEMPERATURE RANGE (TA)
PACKAGE TYPE E ................................................................................................ -40 to +85·C
STORAGE-TEMPERATURE RANGE (Tstg) .......................................................................... -65 to +150·C
LEAD TEMPERATURE (DURING SOLDERING)
At distance 1/16 ± 1/32 In (159 ± 0 79 mm) from case for 10 s max ..................................................... +265·C
File Number 1507
474 ______________________________________________________________
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Seiten | Gesamt 5 Seiten | |
PDF Download | [ CDP1883 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
CDP1881 | CMOS 6-Bit Latch and Decoder Memory Interfaces | GE |
CDP1881C | CMOS 6-Bit Latch and Decoder Memory Interfaces | Intersil Corporation |
CDP1881C | CMOS 6-Bit Latch and Decoder Memory Interfaces | GE |
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