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CDP1855 Schematic ( PDF Datasheet ) - GE

Teilenummer CDP1855
Beschreibung 8-Bit Programmable Multiply/Divide Unit
Hersteller GE
Logo GE Logo 




Gesamt 13 Seiten
CDP1855 Datasheet, Funktion
CMOS Peripherals - - - - - - - - - - - - - - - - - - - - - - - - - - -
CDP1855, CDP1855C
eE
CLEAR
ell
co/OF
Yl
ZL
mnn
elK
ST8
ROI'W"E:
RA 2
RAI
RAil
VSS
28 Vee
27 CNe
cr26 CN I
4 25
5 24 YR
6 23 ZR
7 22 BUS 7
8 21 BUS 6
9 20 BUS 5
10 19 BUS 4
II 18 BUS 3
12 17 BUS 2
13 16 suS I
14 15 BUSg
TOP VIEW
92CS- 2996!5R2
TERMINAL ASSIGNMENT
8-Bit Programmable
Multiply/Divide Unit
Features:
• Cascadable up to 4 units for 32-bit by 32-bit multiply or64 -7- 32 bit divide
• 8-blt by 8-bit multiply or 16 -7- 18 bit divide in 5.6 jJs at 5 Vor 2.8 jJs at 10 V
• Direct interface to CDP1800 series microprocessors
• Easy interface to other 8-bit microprocessors
• Significantly increases throughput of microprocessor used for
arithmetic calculations
The RCA-CDP1855 and CDP1855C are CMOS 8-bit
multiply/divide units which can be used to greatly increase
the capabilities of 8-bit microprocessors. They perform
multiply and divide operations on unsigned, binary
operators. In general, microprocessors do not contain
multiple or divide instructions and even efficiently coded
multiply or divide subroutines require considerable memory
and execution time. These multiply/divide units directly
interface to the CDP1800 series microprocessors via the
N-lines and can easily be configured to fit in either the
memory or I/O space of other 8-bit microprocessors.
The multiple/divide unit is based on a method of multiplying
by add and shift right operations and dividing by subtract
and shift left operations. The device is structured to permit
cascading identical units to handle operands up to 32 bits.
The CDP1855 and CDP1855C are functionally identical.
They differ In that the CDP1855 has a recommended
operating voltage range of4 -10.5 volts, and the CDP1855C,
a recommended operating voltage range of 4 - 6.5 volts.
The CDP1855 and CDP1855C types are supplied in a 28-
lead hermetic dual-in-line ceramic package (D suffix) and
in a 28-lead dual-in-line plastic package (E suffix). The
CDP1855C is also available in chip form (H suffix).
1 +v
j
CLEAR
XTAl
CLEAR
ClK
CE
NO RAO CI
NI RAI CNO
N2 RA2 CNI
TPB STB
MRD RD/WE
CDPI802
E YL CDPI855
ZR
CTl
IT
BUS
CO
C YR
Zl
BUS
Is 92CM-34331
FIg. 1 - CIfCUlt confIguratIOn for MDU addressed as an 110 deVIce.
File Number 1053
404 ____________________________________________________________
~






CDP1855 Datasheet, Funktion
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ CMOS Peripherals
CDP1855, CDP1855C
CONTROL TRUTH TABLE
INPUTS·
RA2 RA1 RAO RD/WE STB
RESPONSE
CE
(N2)
~N!l
JNIl)
(MRDI (TPBI
0 X X X X X NO ACTION (BUS FLOATS)
X 0 X X X X NO ACTION (BUS FLOATS)
1 1 0 0 1 X X TO BUS! INCREMENT SEQUENCE
1 1 0 1 1 X Z TO BUS COUNTER WHEN
1 1 1 0 1 X Y TO BUS STB AND RD = 1
1 1 1 1 1 X STATUS TO BUS
1 1 0 0 0 1 LOAD X FROM BUS! INCREMENT
1 1 0 1 0 1 LOAD Z FROM BUS SEQUENCE
1 1 1 0 0 1 LOAD Y FROM BUS COUNTER
1 1 1 1 0 1 LOAD CONTROL REGISTER
1 1 X X 0 0 NO ACTION (BUS FLOATS)
• ( ) = 1800 system signals. 1 = High Level, 0 = Low Level, X = High or Low Level.
CONTROL REGISTER BIT ASSIGNMENT TABLE
I IBUS 7 BUS 6
I I I IBUS51 BUS41 BUS3 BUS2 BUS1
BUSO
..
, , ++
B1 BO OPERATION SELECT
REGISTER
0 0 NO OPERATION
r
RESET
......----
0 1 MULTIPLY
1 0 DIVIDE
1 1 ILLEGAL STATE
B2 = 1, RESET Z REGISTER
B3 = 1, RESET Y REGISTER
B5 B4 # of MDU's
1 1 ONE MDU
1 0 TWO MDU's
0 1 THREE MDU's
0 0 FOUR MUD's
B6 = 1, RESET SEQUENCE COUNTER
B7 = 1, SELECT SHIFT RATE OPTIONS:
B7 - 0, SHIFT = CLOCK FREQUENCY RATE
..
# OF MDU's
1
2
3
4
SHIFT RATE
CLOCK + 2
CLOCK + 4
CLOCK + 8
CLOCK + 8
Bit
Output
STATUS REGISTER
Status Bvte
7 654 3 2 10
0 0 0 0 0 0 0 O.F.
O.F. = 1 if overflow (only valid
after a divide has been done)
NOTE: Bits 1 - 7 are read as 0 always
_____________________________________________________________ 409

6 Page









CDP1855 pdf, datenblatt
- - - - - - - - - - - - - - - - - - - - - - - - - CMOS Peripherals
CDP1855, CDP1855C
DYNAMIC ELECTRICAL CHARACTERISTICS at TA =-40 to +15° C. VDD ±5'1i tr. tf = 20 nl. VI...=0.7 VDD. VIL = 0.3 VDD.
CL = 100 pF (S. Fig. I)
CHARACTERISTIC-
LIMITS
IVDD
CDP1155
I CDP1155C
UNITS
(¥) Min. \ TyP··l MIK'l Mln'l Typ•• Ma••
Write Cycle
Minimum Clear Pulse Width
Minimum Write Pulse Width
Minimum Data-In Setup
Minimum Oata-In-Hold
Minimum Address to Write Setup
Minimum Address after Write Hold
tClR
5
10
-
-
-50 75
-25 40
tww
5
10
-
-
150 225
75 115
-
-
- -tosu
5
-75 0
10 -40 0
tOH 5
10
-
-
-50 75
-25 40
tASU
5
10
-
-
-50 75
-25 40
tAH 5
10
-
-
-50 75
-25 40
-Maximum limits of minimum characteristics are the values above which all devices function.
'Typical values are for TA = 25° C and nominal voltages.
§Q.. 75
--
150 225
--
-75 0
50 75
50 75
--
50 75
--
ns
j CCLR
CLEAR ~--------------------------------------------~
CE 1/ \\\
RD/WE \'\ (II
STB I) t\\
'ww
' i n V//1J. / / / / / / // / / // / / //LL
'osu I- ~tDH
* WRITE IS OVERLAP OF
CE'I,RIlIWt .~,AND STB·I.
----..
RA~-2 ~
I
~~'ASU"-
92CM-;,4841
-'AH
Fig. 8 - Write timing dIagram.
_______________________________________________________________ 415

12 Page





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