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ACPL-7970 Schematic ( PDF Datasheet ) - AVAGO

Teilenummer ACPL-7970
Beschreibung Optically Isolated Sigma-Delta Modulator
Hersteller AVAGO
Logo AVAGO Logo 




Gesamt 18 Seiten
ACPL-7970 Datasheet, Funktion
ACPL-7970
Optically Isolated Sigma-Delta Modulator
Data Sheet
Description
The ACPL-7970 is a 1-bit, second-order sigma-delta (∑-)
modulator converts an analog input signal into a high-
speed data stream with galvanic isolation based on optical
coupling technology. The ACPL-7970 operates from a 5 V
power supply with dynamic range of 78 dB with an appro-
priate digital filter. The differential inputs of ±200 mV (full
scale ±320 mV) are ideal for direct connection to shunt
resistors or other low-level signal sources in applications
such as motor phase current measurement.
The analog input is continuously sampled by a means of
sigma-delta over-sampling using an on-board clock. The
signal information is contained in the modulator data, as a
density of ones with data rate of 10 MHz, and the data are
encoded and transmitted across the isolation boundary
where they are recovered and decoded into high-speed
data stream of digital ones and zeros. The original signal
information can be reconstructed with a digital filter. The
serial interface for data and clock has a wide supply range
of 3 V to 5.5 V.
Combined with superior optical coupling technology,
the modulator delivers high noise margins and excellent
immunity against isolation-mode transients. With 0.5 mm
minimum distance through insulation (DTI), the ACPL‑7970
provides reliable reinforced insulation and high working
insulation voltage, which is suitable for fail-safe designs.
This outstanding isolation performance is superior to
alternatives including devices based on capacitive- or
magnetic-coupling with DTI in micro-meter range. Offered
in a DIP-8 package, the isolated ADC delivers the reliabil-
ity, small size, superior isolation and over-temperature
performance motor drive designers need to accurately
measure current at much lower price compared to tradi-
tional current transducers.
The external clock version modulator ACPL-796J (SO-16
package) is also available.
Features
10 MHz internal clock
1-bit, second-order sigma-delta modulator
16 bits resolution no missing codes (12 bits ENOB)
78 dB SNR
6 mV/°C maximum offset drift
±1% maximum gain error
Internal reference voltage
±200 mV linear range with single 5 V supply (±320 mV
full scale)
3 V to 5.5 V wide supply range for digital interface
-40° C to +105° C operating temperature range
25 kV/ms common-mode transient immunity
Safety and regulatory approvals:
– IEC/EN/DIN EN 60747-5-5: 891 Vpeak working
insulation voltage
– UL 1577: 5000 Vrms/1min isolation voltage
– CSA: Component Acceptance Notice #5
Applications
Motor phase and rail current sensing
Power inverter current and voltage sensing
Industrial process control
Data acquisition systems
General purpose current and voltage sensing
Traditional current transducer replacements
Functional Block Diagram
VDD1
VIN+
VIN–
Σ-
MODULATOR/
ENCODER
LED
DRIVER
CLK
DECODER
SHIELD
VDD2
MCLK
MDAT
GND1
VREF
GND2
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.






ACPL-7970 Datasheet, Funktion
Table 5. Absolute Maximum Ratings
Parameter
Symbol
Min. Max.
Units
Storage Temperature
Ambient Operating Temperature
Supply Voltage
Steady-State Input Voltage [1, 3]
Two-Second Transient Input Voltage [2]
Digital Output Voltages
Lead Solder Temperature
TS -55 +125
TA -40 +105
VDD1, VDD2
-0.5
6.0
VIN+, VIN–
-2
VDD1 + 0.5
VIN+, VIN–
-6
VDD1 + 0.5
MCLK, MDAT
-0.5
VDD2 + 0.5
260° C for 10 sec., 1.6 mm below seating plane
°C
°C
V
V
V
V
Notes:
1. DC voltage of up to -2 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.
2. Transient voltage of 2 seconds up to -6 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.
3. Absolute maximum DC current on the inputs = 100 mA, no latch-up or device damage occurs.
Table 6. Recommended Operating Conditions
Parameter
Ambient Operating Temperature
VDD1 Supply Voltage
VDD2 Supply Voltage
Input Voltage Range [1]
Notes:
1. Full scale input range ±320 mV.
Symbol
TA
VDD1
VDD2
VIN+, VIN–
Min. Max.
-40 +105
4.5 5.5
3 5.5
-200 +200
Units
°C
V
V
mV
6

6 Page









ACPL-7970 pdf, datenblatt
Analog Input
The differential analog inputs of the ACPL-7970 are im-
plemented with a fully-differential, switched-capacitor
circuit. The ACPL-7970 accepts signal of ±200 mV (full
scale ±320 mV), which is ideal for direct connection to
shunt based current sensing or other low-level signal
sources applications such as motor phase current mea-
surement. An internal voltage reference determines the
full-scale analog input range of the modulator (±320 mV);
an input range of ±200 mV is recommended to achieve
optimal performance. Users are able to use higher input
range, for example ±250 mV, as long as within full-scale
range, for purpose of over-current or overload detection.
Figure 14 shows the simplified equivalent circuit of the
analog input.
In the typical application circuit (Figure 19), the ACPL-7970
is connected in a single-ended input mode. Given the
fully differential input structure, a differential input con-
nection method (balanced input mode as shown in Figure
15) is recommended to achieve better performance. The
input currents created by the switching actions on both of
the pins are balanced on the filter resistors and cancelled
out each other. Any noise induced on one pin will be
coupled to the other pin by the capacitor C and creates
only common mode noise which is rejected by the device.
Typical values for Ra (= Rb) and C are 22 and 10 nF re-
spectively.
VIN+
fSWITCH
= MCLK
200 (TYP)
1.5 pF
3 pF (TYP)
fSWITCH
= MCLK
VIN–
COMMON MODE
ANALOG VOLTAGE
GROUND
1.5 pF
200 (TYP)
3 pF (TYP)
Figure 14. Analog input equivalent circuit.
Latch-up Consideration
Latch-up risk of CMOS devices needs careful consider-
ation, especially in applications with direct connection to
signal source that is subject to frequent transient noise.
The analog input structure of the ACPL-7970 is designed
to be resilient to transients and surges, which are often
encountered in highly noisy application environments
such as motor drive and other power inverter systems.
Other situations could cause transient voltages to the
inputs include short circuit and overload conditions. The
ACPL-7970 is tested with DC voltage of up to -2 V and
2-second transient voltage of up to -6 V to the analog
inputs with no latch-up or damage to the device.
Modulator Data Output
Input signal information is contained in the modulator
output data stream, represented by the density of ones
and zeros. The density of ones is proportional to the input
signal voltage, as shown in Figure 16. A differential input
signal of 0 V ideally produces a data stream of ones and
zeros in equal densities. A differential input of -200 mV
corresponds to 18.75% density of ones, and a differen-
tial input of +200 mV is represented by 81.25% density of
ones in the data stream. A differential input of +320 mV or
higher results in ideally all ones in the data stream, while
input of -320 mV or lower will result in all zeros ideally.
Table 5 shows this relationship.
+Analog Input
–Analog Input
Ra
Rb
5V
VDD1
VIN+
C ACPL-7970
VIN–
GND1
Figure 15. Simplified differential input connection diagram.
MODULATOR OUTPUT
ANALOG INPUT
Figure 16. Modulator output vs. analog input.
12
+FS (ANALOG INPUT)
0 V (ANALOG INPUT)
–FS (ANALOG INPUT)
TIME

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