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EM48AM1684VTC Schematic ( PDF Datasheet ) - Eorex

Teilenummer EM48AM1684VTC
Beschreibung 256Mb Synchronous DRAM
Hersteller Eorex
Logo Eorex Logo 




Gesamt 18 Seiten
EM48AM1684VTC Datasheet, Funktion
eorex
Revision History
Revision 0.1 (Aug. 2007)
- First release.
Revision 0.2 (Jan. 2009)..
- modify improved ICCs
EM48AM1684VTC
Jan. 2009
www.eorex.com
1/18






EM48AM1684VTC Datasheet, Funktion
eorex
EM48AM1684VTC
Recommended DC Operating Conditions
(VDD=3.3V±0.3V, TA=0°C ~70°C)
Symbol
Parameter
Test Conditions
ICC1
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
ICC4
ICC5
Operating Current (Note 1)
Precharge Standby Current in
Power Down Mode
Precharge Standby Current in
Non-power Down Mode
Active Standby Current in
Power Down Mode
Active Standby Current in
Non-power Down Mode
Operating Current (Burst
Mode) (Note 2)
Refresh Current (Note 3)
Burst length=1,
tRCtRC(min.), IOL=0mA,
One bank active
CKEVIL(max.), tCK=15ns
CKEVIL(max.), tCK=
CKEVIL(min.), tCK=15ns,
/CSVIH(min.)
Input signals are changed
one time during 30ns
CKEVIL(min.), tCK= ,
Input signals are stable
CKEVIL(max.), tCK=15ns
CKEVIL(max.), tCK=
CKEVIL(min.), tCK=15ns,
/CSVIH(min.)
Input signals are changed
one time during 30ns
CKEVIL(min.), tCK= ,
Input signals are stable
tCCD2CLKs, IOL=0mA
tRCtRC(min.)
ICC6 Self Refresh Current
CKE0.2V
*All voltages referenced to VSS.
Note 1: ICC1 depends on output loading and cycle rates.
Specified values are obtained with the output open.
Input signals are changed only one time during tCK (min.)
Note 2: ICC4 depends on output loading and cycle rates.
Specified values are obtained with the output open.
Input signals are changed only one time during tCK (min.)
Note 3: Input signals are changed only one time during tCK (min.)
Note 4: Standard power version.
Max.
80
1
1
20
10
3
3
30
30
100
140
1 (Note 4)
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Recommended DC Operating Conditions (Continued)
Symbol
Parameter
IIL Input Leakage Current
IOL Output Leakage Current
VOH High Level Output Voltage
VOL Low Level Output Voltage
Test Conditions
0VIVDDQ, VDDQ=VDD
All other pins not under test=0V
0VOVDDQ, DOUT is disabled
IO=-4mA
IO=+4mA
Min. Typ. Max. Units
-5 +5 uA
-5 +5 uA
2.4 V
0.4 V
Jan. 2009
www.eorex.com
6/18

6 Page









EM48AM1684VTC pdf, datenblatt
eorex
EM48AM1684VTC
Burst Type (A3)
Burst Length
A2 A1 A0
Sequential Addressing
Interleave Addressing
XX0
01
2
XX0
10
01
10
X00
0123
0123
X01
1230
4
X10
2301
1032
2301
X11
3012
3210
000
01234567
01234567
001
12345670
10325476
010
23456701
23016745
011
34567012
8
100
45670123
32107654
45670123
101
56701234
54761032
110
67012345
67452301
111
70123456
76543210
Full Page*
nnn
Cn Cn+1 Cn+2……
* Page length is a function of I/O organization and column addressing ×16 (CA0 ~ CA8):
Full page = 512bits
-
1. Command Truth Table
Command
Symbol
CKE
n-1 n
/CS
/RAS
/CAS
/WE
BA0,
BA1
A10
A11,
A9~A10
Ignore Command
DESL H X H X
X XXX
X
No Operation
NOP H X L H
H HXX
X
Burst Stop
BSTH H X L H H L X X
X
Read
READ H X L H
L HVL
V
Read with Auto Pre-charge READA H X L H
L HVH
V
Write
WRIT H X L H
L LVL
V
Write with Auto Pre-charge WRITA H X L L
H HVH
V
Bank Activate
ACT H X L L
H HVV
V
Pre-charge Select Bank
PRE H X L L
H LVL
X
Pre-charge All Banks
PALL H X L L
H L XH
X
Mode Register Set
MRS H X L L
L LLL
V
H = High level, L = Low level, X = High or Low level (Don't care), V = Valid data input
Jan. 2009
12/18
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12 Page





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