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Teilenummer | EM484M1644VTD |
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Beschreibung | 64Mb Synchronous DRAM | |
Hersteller | Eorex | |
Logo | ||
Gesamt 18 Seiten eorex
EM484M1644VTD
64Mb (1M4Bank16) Synchronous DRAM
Features
• Fully Synchronous to Positive Clock Edge
• Single 3.3V 0.3V Power Supply
• LVTTL Compatible with Multiplexed Address
• Programmable Burst Length (B/L) - 1, 2, 4, 8
or Full Page
• Programmable CAS Latency (C/L) - 2 or 3
• Data Mask (DQM) for Read / Write Masking
• Programmable Wrap Sequence
– Sequential (B/L = 1/2/4/8/full Page)
– Interleave (B/L = 1/2/4/8)
• Burst Read with Single-bit Write Operation
• All Inputs are Sampled at the Rising Edge of
the System Clock
• Auto Refresh and Self Refresh
• 4,096 Refresh Cycles / 64ms (15.625us)
Description
The EM484M1644VTD is Synchronous Dynamic
Random Access Memory (SDRAM) organized as
1Meg words x 4 banks by 16 bits. All inputs and
outputs are synchronized with the positive edge of
the clock.
The 64Mb SDRAM uses synchronized pipelined
architecture to achieve high speed data transfer
rates and is designed to operate at 3.3V low power
memory system. It also provides auto refresh with
power saving / down mode. All inputs and outputs
voltage levels are compatible with LVTTL.
Available packages:TSOPII 54P 400mil.
Ordering Information
Part No
EM484M1644VTD-7F
EM484M1644VTD-6F
EM484M1644VTD-7FE
EM484M1644VTD-6FE
Organization
4M X 16
4M X 16
4M X 16
4M X 16
Max. Freq
143MHz @CL3
166MHz @CL3
143MHz @CL3
166MHz @CL3
Package
54pin TSOP(ll)
54pin TSOP(ll)
54pin TSOP(ll)
54pin TSOP(ll)
Grade
Commercial
Commercial
Extended
Extended
Pb
Free
Free
Free
Free
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eorex
Block Diagram
EM484M1644VTD
Auto/Self
Refresh Counter
A0
A1
DQM
A2
A3
A4
A5
Memory
Write DQM
A6
Array
Control
A7
A8
Data In
A9
A10 S/A & I/O Gating DOi
A11
Col. Decoder
Data Out
BA0
BA1
Col. Add. Buffer
Read DQM
Control
Mode Register Set
Col. Add. Counter
Burst Counter
Timing Register
CLK CKE /CS /RAS /CAS /WE DQM
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6 Page eorex
EM484M1644VTD
Burst Type (A3)
Burst Length
A2 A1 A0
Sequential Addressing
Interleave Addressing
2
4
8
Full Page*
XX 0
XX 0
X00
X01
X10
X11
000
001
010
011
100
101
110
111
nnn
01
10
0123
1230
2301
3012
01234567
12345670
23456701
34567012
45670123
56701234
67012345
70123456
Cn Cn+1 Cn+2……
01
10
0123
1032
2301
3210
01234567
10325476
23016745
32107654
45670123
54761032
67452301
76543210
-
* Page length is a function of I/O organization and column addressing 16 (CA0 ~ CA7):
1. Command Truth Table
Command
Symbol CKE /CS /RAS /CAS /WE BA0, A10 A11,
n-1 n
BA1 A9~A10
Ignore Command
DESL H X H X
X XXX
X
No Operation
NOP H X L H
H HXX
X
Burst Stop
BSTH H X L H
H L XX
X
Read
READ H X L H
L HVL
V
Read with Auto Pre-charge READA H X L H
L HVH
V
Write
WRIT H X L H L L V L
V
Write with Auto Pre-charge WRITA H X L L
H HVH
V
Bank Activate
ACT H X L L
H HVV
V
Pre-charge Select Bank
PRE H X L L
H LVL
X
Pre-charge All Banks
PALL H X L L
H L XH
X
Mode Register Set
MRS H X L L
L LLL
V
Full page = 256bits
H = High level, L = Low level, X = High or Low level (Don't care), V = Valid data input
Apr. 2014
12/18
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12 Page | ||
Seiten | Gesamt 18 Seiten | |
PDF Download | [ EM484M1644VTD Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
EM484M1644VTA | 64Mb SDRAM | Eorex |
EM484M1644VTC | 64Mb (1M x 4Bank x 16) Synchronous DRAM | Eorex |
EM484M1644VTD | 64Mb Synchronous DRAM | Eorex |
Teilenummer | Beschreibung | Hersteller |
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