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CD4044BC Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer CD4044BC
Beschreibung Quad 3-STATE NAND R/S Latches
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 6 Seiten
CD4044BC Datasheet, Funktion
October 1987
Revised January 1999
CD4043BC • CD4044BC
Quad 3-STATE NOR R/S Latches •
Quad 3-STATE NAND R/S Latches
General Description
The CD4043BC are quad cross-couple 3-STATE CMOS
NOR latches, and the CD4044BC are quad cross-couple 3-
STATE CMOS NAND latches. Each latch has a separate Q
output and individual SET and RESET inputs. There is a
common 3-STATE ENABLE input for all four latches. A
logic “1” on the ENABLE input connects the latch states to
the Q outputs. A logic “0” on the ENABLE input discon-
nects the latch states from the Q outputs resulting in an
open circuit condition on the Q output. The 3-STATE fea-
ture allows common bussing of the outputs.
Features
s Wide supply voltage range: 3V to 15V
s Low power: 100 nW (typ.)
s High noise immunity: 0.45 VDD (typ.)
s Separate SET and RESET inputs for each latch
s NOR and NAND configuration
s 3-STATE output with common output enable
Applications
• Multiple bus storage
• Strobed register
• Four bits of independent storage with output enable
• General digital logic
Ordering Code:
Order Number Package Number
Package Description
CD4043BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
CD4043BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
CD4044BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
CD4044BCSJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4044BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC and SOP
CD4043BC
Pin Assignments for DIP and SOIC
CD4044BC
Top View
© 1999 Fairchild Semiconductor Corporation DS005967.prf
Top View
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CD4044BC Datasheet, Funktion
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assumeany responsibility for use of any circuitry described, no circuit patent licenses are impliedandFairchildreserves theright at any timewithout noticetochange saidcircuitry andspecifications.

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