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PDF AD548 Data sheet ( Hoja de datos )
| Número de pieza | AD548 | |
| Descripción | Low Power BiFET Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
Precision, Low Power
BiFET Op Amp
AD548
FEATURES
Enhanced Replacement for LF441 and TL061
DC Performance:
200 A max Quiescent Current
10 pA max Bias Current, Warmed Up (AD548C)
250 V max Offset Voltage (AD548C)
2 V/؇C max Drift (AD548C)
2 V p-p Noise, 0.1 Hz to 10 Hz
AC Performance:
1.8 V/s Slew Rate
1 MHz Unity Gain Bandwidth
Available in Plastic and Hermetic Metal Can Packages
and in Chip Form
Available in Tape and Reel in Accordance with
EIA-481A Standard
MIL-STD-883B Parts Available
Dual Version Available: AD648
Surface-Mount (SOIC) Package Available
PRODUCT DESCRIPTION
The AD548 is a low power, precision monolithic operational
amplifier. It offers both low bias current (10 pA max, warmed
up) and low quiescent current (200 µA max) and is fabricated
with ion-implanted FET and laser wafer trimming technologies.
Input bias current is guaranteed over the AD548’s entire
common-mode voltage range.
The economical J grade has a maximum guaranteed input offset
voltage of less than 2 mV and an input offset voltage drift of less
than 20 µV/°C. This level of dc precision is achieved utilizing
Analog’s laser wafer drift trimming process. The combination of
low quiescent current and low offset voltage drift minimizes
changes in input offset voltage due to self-heating effects.
The AD548 is recommended for any dual supply op amp applica-
tion requiring low power and excellent dc and ac performance.
In applications such as battery-powered, precision instrument
front ends and CMOS DAC buffers, the AD548’s excellent com-
bination of low input offset voltage and drift, low bias current,
and low 1/f noise reduces output errors. High common-mode
rejection (82 dB, min on the “B” grade) and high open-loop
gain ensures better than 12-bit linearity in high impedance,
buffer applications.
The AD548 is pinned out in a standard op amp configuration
and is available in three performance grades. The AD548J and
AD548K are rated over the commercial temperature range of
0°C to 70°C. The AD548B is rated over the industrial tempera-
ture range of –40°C to +85°C.
The AD548 is available in an 8-lead plastic mini-DIP and
surface-mount (SOIC) packages.
CONNECTION DIAGRAMS
Plastic Mini-DIP (N) Package
and
SOIC (R)Package
OFFSET NULL 1
INVERTING
INPUT
2
NONINVERTING 3
INPUT
V– 4
AD548
TOP VIEW
8 NC
7 V+
6 OUTPUT
5 OFFSET
NULL
NOTE: PIN 4 CONNECTED TO CASE
NC = NO CONNECT
10k⍀
1
5
VOS TRIM
TOP VIEW
4 –15V
PRODUCT HIGHLIGHTS
1. A combination of low supply current, excellent dc and ac
performance and low drift makes the AD548 the ideal op
amp for high performance, low power applications.
2. The AD548 is pin compatible with industry standard op
amps such as the LF441, TL061, and AD542, enabling
designers to improve performance while achieving a reduction
in power dissipation of up to 85%.
3. Guaranteed low input offset voltage (2 mV max) and drift
(20 µV/°C max) for the AD548J are achieved utilizing
Analog Devices’ laser drift trimming technology, eliminating
the need for external trimming.
4. Analog Devices specifies each device in the warmed-up
condition, insuring that the device will meet its published
specifications in actual use.
5. A dual version, the AD648, is also available.
6. Enhanced replacement for LF441 and TL061.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
1 page  
AD548
ABSOLUTE MAXIMUM RATINGSl
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . 500 mW
Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . . +VS and –VS
Storage Temperature Range (Q, H) . . . . . . . –65°C to +150°C
(N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD548J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
AD548B . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2Thermal Characteristics: 8-Pin SOIC Package: θJA = 160°C/W, θJC = 42°C/W;
8-Lead Plastic Package: θJA = 90°C/W.
3For supply voltages less than ± 18 V, the absolute maximum input voltage is equal
to the supply voltage.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD548 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– REV. D
5 Page 
AD548
compensation is provided by resistors R8 and R15 that have a
positive 3500 ppm/°C temperature coefficient. The transfer
function for the output voltage is:
VOUT = 1V log10 ( I2 / I1)
Frequency compensation is provided by R11, R12, C1, and C2.
Small signal bandwidth is approximately 300 kHz at input cur-
rents above 100 µA and will proportionally decrease with lower
signal levels. D1, D2, R13, and R14 compensate for the effects
of the two logging transistors’ ohmic emitter resistance.
To trim this circuit, set the two input currents to 10 µA and adjust
VOUT to zero by adjusting the potentiometer on A3. Then set I2
to 1 µA and adjust the scale factor such that the output voltage is
1 V by trimming potentiometer R10. Offset adjustment for A1 and
A2 is provided to increase the accuracy of the voltage inputs.
This circuit ensures a 1% log conformance error over an input
current range of 300 pA to 1 mA, with low level accuracy
limited by the AD548’s input current. The low level input voltage
accuracy of this circuit is limited by the input offset voltage and
drift of the AD548.
Figure 10. Log Ratio Amplifier
–10–
REV. D
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet AD548.PDF ] | |
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