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CD4028BMS Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer CD4028BMS
Beschreibung CMOS BCD-To-Decimal Decoder
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 10 Seiten
CD4028BMS Datasheet, Funktion
CD4028BMS
December 1992
CMOS BCD-To-Decimal Decoder
Features
Pinout
• High Voltage Type (20V Rating)
• BCD-to-Decimal Decoding or Binary-to-Octal Decoding
CD4028BMS
TOP VIEW
• High Decoded Output Drive Capability
• “Positive Logic” Inputs and Outputs - Decoded Out-
puts Go High On Selection
• Medium-Speed Operation
- tPHL, tPLH = 80ns (typ) at VDD = 10V
• Standardized Symmetrical Output Characteristics
• 100% Tested For Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full
Package-Temperature Range;
- 100nA at 18V and +25oC
41
22
03
74
95
56
67
VSS 8
16 VDD
15 3
14 1
13 B
12 C
11 D
10 A
98
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Code Conversion
• Indication-Tube Decoder
• Address Decoding - Memory Selection Control
Description
Functional Diagram
3-BIT
BINARY
INPUTS
BCD
INPUTS
VDD
16
3
0
10
A
14
1
2
2
13
B
15
3
1
4
12
C
6
5
67
11
D
4
7
9
8
95
8
VSS
BUFFERED
OCTAL
DECODED
OUTPUTS
(1 OF 8)
BUFFERED
DECIMAL
DECODED
OUTPUTS
(1 OF 10)
CD4028BMS types are BCD-to-decimal or binary-to-octal
decoders consisting of buffering on all 4 inputs, decoding
logic gates, and 10 output buffers. A BCD code applied to
the four inputs, A to D, results in a high level at the selected
one of 10 decimal decoded outputs. Similarly, a 3-bit binary
code applied to inputs A through C is decoded in octal code
at output 0 to 7 if D = “0”. High drive capability is provided at
all outputs to enhance dc and dynamic performance in high
fan-out applications.
The CD4028BMS is supplied in these 16-lead outline pack-
ages:
Braze Seal DIP H4S
Frit Seal DIP
H1E
Ceramic Flatpack H3X
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-788
File Number 3303






CD4028BMS Datasheet, Funktion
Logic Diagram
*
A 10
*
B 13
*
C 12
CD4028BMS
*
D 11
VDD
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
30
14 1
22
15 3
14
65
76
47
98
59
VSS
TABLE 1. TRUTH TABLE
DCBA0 1 2 3 4 5 6 7 8 9
00001000000000
00010100000000
00100010000000
00110001000000
01000000100000
01010000010000
01100000001000
01110000000100
10000000000010
10010000000001
10100000000000
10110000000000
11000000000000
11010000000000
11100000000000
11110000000000
1 = HIGH LEVEL
0 = LOW LEVEL
7-793

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