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AD7366-5 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD7366-5
Beschreibung Simultaneous Sampling SAR ADCs
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 28 Seiten
AD7366-5 Datasheet, Funktion
True Bipolar Input, 12-/14-Bit,
2-Channel, Simultaneous Sampling SAR ADCs
AD7366-5/AD7367-5
FEATURES
Dual 12-bit/14-bit, 2-channel ADCs
True bipolar analog inputs
Programmable input ranges
±10 V, ±5 V, 0 V to +10 V
±12 V with +3 V external reference
Throughput rate: 500 kSPS
Simultaneous conversion with read in less than 2 μs
High analog input impedance
Low current consumption
5.1 mA typical in normal mode
320 nA typical in shutdown mode
AD7366-5
72 dB SNR at 50 kHz input frequency
12-bit no missing codes
AD7367-5
76 dB SNR at 50 kHz input frequency
14-bit no missing codes
Accurate on-chip reference: 2.5 V ± 0.2%
–40°C to +85°C operation
High speed serial interface
SPI-/QSPI-/MICROWIRE-/DSP-compatible
iCMOS process technology
Available in a 24-lead TSSOP
GENERAL DESCRIPTION
The AD7366-5/AD7367-51 are dual, 12-/14-bit, low power,
successive approximation analog-to-digital converters (ADCs)
that feature throughput rates up to 500 kSPS. Each device contains
two ADCs, which are both preceded by a 2-channel multiplexer,
and a low noise, wide bandwidth, track-and-hold amplifier.
The AD7366-5/AD7367-5 are fabricated on the Analog
Devices, Inc., industrial CMOS process (iCMOS®)2, which is
a technology platform combining the advantages of low and
high voltage CMOS. The process allows the parts to accept
high voltage bipolar signals in addition to reducing power
consumption and package size. The AD7366-5/AD7367-5 can
accept true bipolar analog input signals in the ±10 V range,
±5 V range, and 0 V to +10 V range.
1 Protected by U.S. Patent No. 6,731,232.
2 For analog systems designers within industrial/instrumentation equipment
OEMs who need high performance ICs at higher voltage levels, iCMOS is a
technology platform that enables the development of analog ICs capable of
+30 V and operating at ±15 V supplies while allowing dramatic reductions in
power consumption and package size, and increased ac and dc performance.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
VDD
DCAPA
AVCC
DVCC
REF
VA1
MUX
VA2
VB1
MUX
VB2
BUF
AD7366-5/AD7367-5
T/H
T/H
BUF
12-/14-BIT
SUCCESSIVE
APPROXIMATION
ADC
OUTPUT
DRIVERS
CONTROL
LOGIC
12-/14-BIT
SUCCESSIVE
APPROXIMATION
ADC
OUTPUT
DRIVERS
DOUTA
SCLK
CNVST
CS
BUSY
ADDR
RANGE0
RANGE1
REFSEL
VDRIVE
DOUTB
AGND AGND
VSS
DCAPB
Figure 1.
DGND
The devices have an on-chip 2.5 V reference that can be disabled to
allow the use of an external reference. If a 3 V reference is applied
to the DCAPA and DCAPB pins, the AD7366-5/AD7367-5 can
accept a true bipolar ±12 V analog input. Minimum ±12 V VDD
and VSS supplies are required for the ±12 V input range.
PRODUCT HIGHLIGHTS
1. True bipolar analog input signals can be accepted, as well
as ±10 V, ±5 V, ±12 V (with external reference), and 0 V to
+10 V unipolar signals.
2. Two complete ADC functions allow simultaneous
sampling and conversion of two channels.
3. A 500 kSPS serial interface is SPI-/QSPI™-/MICROWIRE™-/
DSP-compatible.
Table 1. Related Products
Device
Resolution Throughput Rate
AD7366
12-Bit
1 MSPS
AD7366-5 12-Bit
500 kSPS
AD7367
14-Bit
1 MSPS
AD7367-5 14-Bit
500 kSPS
No. of Channels
Dual, 2-channel
Dual, 2-channel
Dual, 2-channel
Dual, 2-channel
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007-2011 Analog Devices, Inc. All rights reserved.






AD7366-5 Datasheet, Funktion
AD7366-5/AD7367-5
Parameter
REFERENCE INPUT/OUTPUT
Reference Output Voltage3
Long-Term Stability
Output Voltage Hysteresis1
Reference Input Voltage Range
DC Leakage Current
Input Capacitance
DCAPA, DCAPB Output Impedance
Reference Temperature Coefficient
VREF Noise
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN2
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating State Leakage Current
Floating State Output Capacitance2
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time2
Throughput Rate
POWER REQUIREMENTS
VCC
VDD
VSS
VDRIVE
Normal Mode (Static)
IDD
ISS
ICC
Normal Mode (Operational)
IDD
ISS
ICC
Shutdown Mode
IDD
ISS
ICC
Power Dissipation
Normal Mode (Operational)
Shutdown Mode
Min Typ Max
2.494
2.5
2.5
150
50
±0.01
25
17
7
6
20
2.506
3.0
±1
25
0.7 × VDRIVE
±0.01
6
0.8
±1
VDRIVE − 0.2
±0.01
8
0.4
±1
1.25
140
500
4.75
5
−16.5
2.7
5.25
16.5
−5
5.25
370 550
40 60
1.5 2.25
1 1.2
0.7 0.82
3.4 4
0.01 1
0.01 1
0.3 3
46 54.5
15
20
1.9 48.75
1 See the Terminology section.
2 Sample tested during initial release to ensure compliance.
3 Refers to Pin DCAPA or Pin DCAPB.
Unit Test Conditions/Comments
V
ppm
ppm
V
μA
pF
pF
Ω
ppm/°C
μV rms
±0.2% maximum @ 25°C
For 1000 hours
External reference applied to DCAPA/Pin DCAPB
±5 V and ±10 V analog input range
0 V to 10 V analog input range
Bandwidth = 3 kHz
V
V
μA VIN = 0 V or VDRIVE
pF
V
V
μA
pF
ns
ns
kSPS
V
V
V
V
Full-scale step input
For 2.7 V ≤ VDRIVE ≤ 5.25 V, fSCLK = 20 MHz
Digital inputs = 0 V or VDRIVE
See Table 7
See Table 7
See Table 7
μA VDD = 16.5 V
μA VSS = −16.5 V
mA VCC = 5.5 V
fS = 500 kSPS
mA VDD = 16.5 V
mA VSS = −16.5 V
mA VCC = 5.25 V, internal reference enabled
μA VDD = 16.5 V
μA VSS = −16.5 V
μA VCC = 5.25 V
mW VDD = +16.5 V, VSS = −16.5 V, VCC = +5.25 V
mW ±10 V input range, fS = 100 kSPS
mW ±5 V and 0 V to +10 V input range, fS = 100 kSPS
μW VDD = +16.5 V, VSS = −16.5 V, VCC = +5.25 V
Rev. B | Page 6 of 28

6 Page









AD7366-5 pdf, datenblatt
AD7366-5/AD7367-5
–70
–75
–80
–85
–90
–95
–100
–105
–110
0
±5V RANGE
0V TO +10V RANGE
±10V RANGE
VADVDCC= =155VfVS,V,V=DDSRV5SI0CV=0CEk–==S1P553SVVV
INTERNAL REFERENCE
100 200 300 400 500
FREQUENCY OF INPUT NOISE (kHz)
600
Figure 9. Channel-to-Channel Isolation
110000
31 CODES
100000
106091 CODES
344 CODES
90000
80000
70000
60000
50000
40000
30000
20000
10000
0
8191
8192
8193
8194
CODE
8195
8196
Figure 10. Histogram of Codes for 200k Samples
–70
VCC, ADC A
–80
100mV p-p SINE WAVE ON AVCC
NO DECOUPLING CAPACITOR
VCC, ADC B
VDD = 15VfS,VV=DSR5SI0V=0Ek–=S1P53SVV
–90
VDD, ADC B
–100
VDD, ADC A
–110
VSS, ADC B
VSS, ADC A
–120
0
200 400 600 800 1000
SUPPLY RIPPLE FREQUENCY (kHz)
1200
Figure 11. PSRR vs. Supply Ripple Frequency Without Supply Decoupling
40
VAfVSDDV=DRCICV5=E0=10=5k5VSV3,VP, VDSSVSC=C
= 5V
–15V
30 INTERNAL REFERENCE
20
10
VIN = 0V TO +10V
VIN = +5V
VIN = +10V
0
–10
VIN = –5V
VIN = –10V
–20
100 150 200 250 300 350 400 450 500
THROUGHPUT RATE (kSPS)
Figure 12. Analog Input Current vs. Throughput Rate
Rev. B | Page 12 of 28

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