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PDF AD9694 Data sheet ( Hoja de datos )
| Número de pieza | AD9694 | |
| Descripción | Quad Analog-to-Digital Converter | |
| Fabricantes | Analog Devices | |
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Data Sheet
14-Bit, 500 MSPS JESD204B,
Quad Analog-to-Digital Converter
AD9694
FEATURES
JESD204B (Subclass 1) coded serial digital outputs
Lane rates up to 15 Gbps
1.66 W total power at 500 MSPS
415 mW per analog-to-digital converter (ADC) channel
SFDR = 82 dBFS at 305 MHz (1.80 V p-p input range)
SNR = 66.8 dBFS at 305 MHz (1.80 V p-p input range)
Noise density = −151.5 dBFS/Hz (1.80 V p-p input range)
0.975 V, 1.8 V, and 2.5 V dc supply operation
No missing codes
Internal ADC voltage reference
Analog input buffer
On-chip dithering to improve small signal linearity
Flexible differential input range
1.44 V p-p to 2.16 V p-p (1.80 V p-p nominal)
1.4 GHz analog input full power bandwidth
Amplitude detect bits for efficient AGC implementation
4 integrated wideband digital processors
48-bit NCO, up to 4 cascaded half-band filters
Differential clock input
Integer clock divide by 1, 2, 4, or 8
On-chip temperature diode
Flexible JESD204B lane configurations
APPLICATIONS
Communications
Diversity multiband, multimode digital receivers
3G/4G, W-CDMA, GSM, LTE, LTE-A
General-purpose software radios
Ultrawideband satellite receivers
Instrumentation
Radars
Signals intelligence (SIGINT)
FUNCTIONAL BLOCK DIAGRAM
AVDD1 AVDD1_SR AVDD2
(0.975V) (0.975V)
(1.8V)
AVDD3
(2.5V)
DVDD DRVDD DRVDD2 SPIVDD
(0.975V) (0.975V) (1.8V)
(1.8V)
VIN+A
VIN–A
VCM_AB
FD_A
FD_B
VIN+B
VIN–B
BUFFER
ADC
CORE
14
FAST
DETECT
SIGNAL
MONITOR
BUFFER
ADC
CORE
14
DIGITAL DOWN
CONVERTER
(DDC)
DIGITAL DOWN
CONVERTER
(DDC)
CLK+
CLK–
VIN+C
VIN–C
VCM_CD
FD_C
FD_D
VIN+D
VIN–D
CLOCK
GENERATION
÷2
÷4
÷8
BUFFER
ADC
CORE
14
DIGITAL DOWN
CONVERTER
(DDC)
FAST
DETECT
SIGNAL
MONITOR
BUFFER
ADC
CORE
14
DIGITAL DOWN
CONVERTER
(DDC)
SPI CONTROL
JESD204B
HIGH-SPEED
SERIALIZER
2
Tx
OUTPUTS
SERDOUT0AB±
SERDOUT1AB±
SIGNAL
MONITOR
AND FAST
DETECT
JESD204B
SUBCLASS 1
CONTROL
SYSREF±
SYNCINB±AB
SYNCINB±CD
JESD204B
HIGH-SPEED
SERIALIZER
2
Tx
OUTPUTS
SERDOUT0CD±
SERDOUT1CD±
AD9694
PDWN/STBY
AGND DRGND SDIO SCLK CSB
Figure 1.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
AD9694
AC SPECIFICATIONS
AVDD1 = 0.975 V, AVDD1_SR = 0.975 V, AVDD2 = 1.8 V, AVDD3 = 2.5 V, DVDD = 0.975 V, DRVDD1 = 0.975 V, DRVDD2 = 1.8 V,
SPIVDD = 1.8 V, specified maximum sampling rate, clock divider = 4, 1.8 V p-p full-scale differential input, 0.5 V internal reference,
AIN = −1.0 dBFS, default SPI settings, unless otherwise noted. Minimum and maximum specifications are guaranteed for the full
operating junction temperature (TJ) range of −40°C to +105°C. Typical specifications represent performance at TJ = 50°C (TA = 25°C).
Table 2. 500 MSPS AC Specifications
Parameter1
ANALOG INPUT FULL SCALE
NOISE DENSITY2
SIGNAL-TO-NOISE RATIO (SNR)3
fIN = 10 MHz
fIN = 155 MHz
fIN = 305 MHz
fIN = 450 MHz
fIN = 765 MHz
fIN = 985 MHz
SIGNAL-TO-NOISE-AND-DISTORTION
RATIO (SINAD)2
fIN = 10 MHz
fIN = 155 MHz
fIN = 305 MHz
fIN = 450 MHz
fIN = 765 MHz
fIN = 985 MHz
EFFECTIVE NUMBER OF BITS (ENOB)
fIN = 10 MHz
fIN = 155 MHz
fIN = 305 MHz
fIN = 450 MHz
fIN = 765 MHz
fIN = 985 MHz
SPURIOUS-FREE DYNAMIC RANGE (SFDR)2
fIN = 10 MHz
fIN = 155 MHz
fIN = 305 MHz
fIN = 450 MHz
fIN = 765 MHz
fIN = 985 MHz
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
AT −3 dBFS
fIN = 10 MHz
fIN = 155 MHz
fIN = 305 MHz
fIN = 450 MHz
fIN = 765 MHz
fIN = 985 MHz
WORST HARMONIC, SECOND OR THIRD2
fIN = 10 MHz
fIN = 155 MHz
fIN = 305 MHz
fIN = 450 MHz
fIN = 765 MHz
fIN = 985 MHz
Analog Input Full Scale =
1.44 V p-p
Min Typ
Max
1.44
−149.7
65.4
65.3
65.2
65.0
64.8
64.5
65.3
65.2
65.1
65.0
64.7
64.2
10.5
10.5
10.5
10.5
10.4
10.3
89
89
82
82
77
82
94
94
89
87
82
85
−89
−89
−82
−82
−77
−82
Analog Input Full Scale =
1.80 V p-p
Min Typ
Max
1.80
−151.5
67.1
64.8 67.0
66.8
66.6
66.5
66.0
67.0
64.5 66.8
66.6
66.4
66.1
65.5
10.8
10.4 10.8
10.7
10.7
10.6
10.6
90
75 85
82
83
75
79
94
90
90
86
80
82
−90
−85 −75
−82
−83
−75
−79
Analog Input Full Scale =
2.16 V p-p
Min Typ
Max
2.16
−153.0
68.4
68.3
68.0
67.8
67.5
66.9
68.2
67.9
67.6
67.3
66.9
66.2
11.0
10.9
10.9
10.8
10.8
10.7
80
77
78
77
72
76
86
82
83
84
77
79
−80
−77
−78
−77
−72
−76
Unit
V p-p
dBFS/Hz
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
Bits
Bits
Bits
Bits
Bits
Bits
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
Rev. 0 | Page 5 of 101
5 Page 
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 8.
Parameter
Electrical
AVDD1 to AGND
AVDD1_SR to AGND
AVDD2 to AGND
AVDD3 to AGND
DVDD to DGND
DRVDD1 to DRGND
DRVDD2 to DRGND
SPIVDD to AGND
VIN±x to AGND
CLK± to AGND
SCLK, SDIO, CSB to DGND
PDWN/STBY to DGND
SYSREF± to AGND_SR
SYNCINB±AB/SYNCINB±CD to
DRGND
Environmental
Operating Junction Temperature
Range
Maximum Junction Temperature
Storage Temperature Range
(Ambient)
Rating
1.05 V
1.05 V
2.00 V
2.70 V
1.05 V
1.05 V
2.00 V
2.00 V
−0.3 V to AVDD3 + 0.3 V
−0.3 V to AVDD1 + 0.3 V
−0.3 V to SPIVDD + 0.3 V
−0.3 V to SPIVDD + 0.3 V
0 V to 2.5 V
0 V to 2.5 V
−40°C to +105°C
125°C
−65°C to +150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
AD9694
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
θJA is the natural convection junction to ambient thermal
resistance measured in a one cubic foot sealed enclosure.
θJC_BOT is the bottom junction to case thermal resistance.
Table 9. Thermal Resistance
PCB Type Airflow Velocity (m/sec)
JEDEC
0.0
2s2p Board 1.0
2.5
10-Layer
Board
0.0
θJA
21.581, 2
17.941, 2
16.581, 2
9.74
θJC_BOT
1.951, 5
N/A4
N/A4
1.00
Unit
°C/W
°C/W
°C/W
°C/W
1 Per JEDEC 51-7, plus JEDEC 51-5 2s2p test board.
2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
3 Per JEDEC JESD51-8 (still air).
4 N/A means not applicable.
5 Per MIL-STD 883, Method 1012.1.
ESD CAUTION
Rev. 0 | Page 11 of 101
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD9694.PDF ] | |
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