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Número de pieza AD8488
Descripción 128-Channel Digital X-Ray Analog Front End
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
FEATURES
128 integrator channels
Correlated double sample error correction (CDS)
Corrects for VOS and LF noise
Power consumption per channel
Normal: 11 mW
Low power: 4 mW
Low input leakage current: −1.5 pA typical
Low input referred noise (QNI): 993 erms typical
Linearity error: 0.03% typical
Compact 17 mm × 17 mm BGA
Selectable filter time constants
4 selectable input charge ranges
10 selectable gain ranges
APPLICATION
High performance digital X-ray systems
Medical X-ray
Security (baggage scanner) systems
128-Channel
Digital X-Ray Analog Front End
AD8488
GENERAL DESCRIPTION
The AD8488 is a 128-channel, analog front end (AFE) designed for
use in high performance digital X-ray systems. The analog channels
consist of an integrator followed by a gain selectable single-ended
to low impedance differential output. The analog channel converts
the charge acquired by X-ray or photodiode detectors to a voltage.
The channels are composed of CMOS transistors, using typical
high input impedance CMOS gates. The integrators generate charge
dependent voltages using a range of selectable capacitance values that
accommodate a broad range of input charge values. The integrators
are followed by single-ended input to differential output voltage
amplifiers where offset and low frequency noise voltages are
subtracted from the input voltages. A 128:1 channel differential
MUX follows the buffers and drives the analog output buffer.
Switch drivers and certain digital timing functions are included, and
all are mounted on a 255-lead BGA substrate. Charge conversion
for all 128 channels is simultaneous followed by a sequential voltage
output read of the channels using a 7-bit address code. The sequence
occurs twice, sampling all 128 channels. Logic control inputs, CS_A
and CS_B, select the lower and upper 64 blocks of the channel
addresses.
The AD8488 is packaged in a 17 mm × 17 mm, 255-lead, RoHS-
compliant ball grid array (BGA). The operating temperature range
is 0°C to 85°C ambient.
IN0:127
ANALOG
INPUTS
VREF
FUNCTIONAL BLOCK DIAGRAM
CHARGE CONVERSION AMPLIFIER
128 CHANNELS
DIFFERENTIAL
OUTPUT
IINNTT
LPF GAIN AMPLIFIER
MULTIPLEXER
128:1
TIMING SIGNALS
128
TIMING AND CONTROL
7
CONTROL REGISTER
MUX SELECTOR
2427
OUTPUT
BUFFER
OUTHI
OUTLO
Figure 1.
CONTROL SIGNALS
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.

1 page




AD8488 pdf
AD8488
Data Sheet
Parameter
OUTPUT VOLTAGE
OUTHIGH
OUTLOW
INPUT REFERRED NOISE4
Normal
Low Power
PANEL CAPACITANCE
LINEARITY ERROR5
Normal
Low Power
OPERATING TEMPERATURE
Test Conditions/Comments
CF1 = 0.9 pF, G = 10
CPANEL = 38 pF
CPANEL = 61 pF
CF1 = 0.9 pF, G = 5
Ambient, normal and low power
Min Typ
Max Unit
2.0 V
2.0 V
993
2000
0
erms
erms
80 pF
0.03 + 1
% + LSB
0.2 + 8.2
% + LSB
0 85 °C
1 Defined as the output voltage divided by the input charge (number of electrons in this case) with the gain amp setting (G = 1). This includes the gain error of the gain amp.
2 Each gain at G = 2, G = 4, G = 8, and G = 10 is calculated as the ratio of each output voltage to that at G = 1. Each measurement corresponds to the selection of each gain
setting capacitor.
3 Gain deviation over temperature.
4 The output noise voltage is measured and converted into the input referred noise electrons.
5 It is defined as the deviation from a best fit line, including the origin. The output voltage is measured with five different input conditions.
Rev. A | Page 4 of 20

5 Page





AD8488 arduino
AD8488
Table 7. 255-Ball CSP_BGA Ball Assignment (Alphabetically by Signal)
Signal Ball
Signal Ball
Signal Ball
Signal
AGND E5
AVDD H12
HOLD T16
IN43
AGND E6
AVDD J6
IN0 N11
IN44
AGND E7
AVDD J11
IN1 P11
IN45
AGND E8
AVDD K6
IN2 T11
IN46
AGND E9
AVDD K11
IN3 T12
IN47
AGND F5
AVDD L6
IN4 T10
IN48
AGND G5
AVDD L8
IN5 R11
IN49
AGND G7
AVDD L9
IN6 R12
IN50
AGND G8
AVDD L10
IN7 P12
IN51
AGND G9
AVDD L11
IN8 T4
IN52
AGND G10
CLK D15
IN9 N12
IN53
AGND H5
CK_ENa E14
IN10 T9
IN54
AGND H7
CK_ENb F14
IN11 R10
IN55
AGND H8
CS_A
N14
IN12 P10
IN56
AGND H9
CS_B
M15
IN13 T8
IN57
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
H10
J5
J7
J8
J9
J10
K5
K7
K8
K9
K10
L5
L7
M5
M6
M7
M8
M9
M10
M11
F6
F7
F8
F9
F10
G6
G11
H6
H11
CF1SEL0
CF1SEL1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
FSEL0
FSEL1
GRST
GNSEL0
GNSEL1
GNSEL2
GNSEL3
C15
B15
F16
G15
G16
H15
H16
J15
J16
K15
K16
L16
B16
C16
D16
E16
F15
L15
M16
N16
P16
R16
R14
T14
H14
D14
C14
B14
A14
IN14 P9
IN15 R9
IN16 T5
IN17 T3
IN18 T2
IN19 T1
IN20 T6
IN21 T7
IN22 R8
IN23 R7
IN24 P8
IN25 R1
IN26 R2
IN27 R3
IN28 R4
IN29 R5
IN30 R6
IN31 P1
IN32 N8
IN33 N10
IN34 P7
IN35 P6
IN36 P5
IN37 P3
IN38 P4
IN39 P2
IN40 N9
IN41 N1
IN42 N6
IN58
IN59
IN60
IN61
IN62
IN63
IN64
IN65
IN66
IN67
IN68
IN69
IN70
IN71
IN72
IN73
IN74
IN75
IN76
IN77
IN78
IN79
IN80
IN81
IN82
IN83
IN84
IN85
IN86
Ball
N5
N4
N3
N2
M1
M4
M3
M2
N7
L4
L3
L2
L1
K4
K3
K2
K1
J4
J3
J2
J1
H4
H3
H2
H1
E3
E2
G4
G3
G2
G1
C8
E1
F4
F3
F2
F1
A5
C7
E4
D8
A6
D7
D6
Data Sheet
Signal
IN87
IN88
IN89
IN90
IN91
IN92
IN93
IN94
IN95
IN96
IN97
IN98
IN99
IN100
IN101
IN102
IN103
IN104
IN105
IN106
IN107
IN108
IN109
IN110
IN111
IN112
IN113
IN114
IN115
IN116
IN117
IN118
IN119
IN120
IN121
IN122
IN123
IN124
IN125
IN126
IN127
IRST
NC
NC
Ball
D5
D4
D3
D2
D1
C6
C5
C4
C3
C2
C1
B6
B5
B4
B3
B2
B1
B8
B7
A4
A3
A2
D10
A7
A8
A9
B9
C9
A10
B10
C10
D9
A11
B11
C11
E11
D11
A12
B12
D12
C12
E15
A13
A15
Signal Ball
NC B13
NC C13
NC D13
NC E10
NC E12
NC E13
NC F11
NC F13
NC G13
NC H13
NC J12
NC J13
NC K13
NC L13
NC M12
NC M13
NC N13
NC P13
NC R13
NC T13
OUTLOW F12
OUTHIGH G12
PWR P14
RST A16
TST_MODE J14
TST0
T15
TST1
R15
TST2
P15
TST3
N15
TST4
M14
TST5
L14
TST6
K14
VREF
L12
VREF_ESD K12
WR G14
Rev. A | Page 10 of 20

11 Page







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