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AD9006 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD9006
Beschreibung A/D Converter
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 15 Seiten
AD9006 Datasheet, Funktion
ANALOG DEVICES FAX-ON-DEMANDHOTLINE - Page 16
,. ANALOG
W DEVICES
HighSpeed6-Bit
AIDConverters
I AD9006/AD9016I
FEATURES
FUNCTIONAL BLOCK DIAGRAM
500MSPS Encode Rate
Very Low Input Capacitance: 8pF
3OdBSNR @ 200M Hz Analog Input
MIL-STD-883 Available
Bipolar Input Range (:t1V)
Demultiplexed Outputs (AD9016)
Mll-STD-883-Compliant Versions Available
DD ., Dol 'NVERT
.
MS. !NVERT "
~A~~~Z~1
to
..09016
OUTI'tJT
LATCHES
'8) OVERFLOW A
BAN' A
APPLICATIONS
Radar Warning Receivers
Electronic Countermeasures
Transient Recorders
"Smart" Munitions
Digital Oscilloscopes
OBSGENERAL DESCRIPTION
The AD9006 and AD9016 are 6-bit, ultrahigh speed analog-ro-
Odigital converters. Both are fabricated in an advanced bipolar
process, assuring exceptionally wide analog input bandwidth,
Land encode rates up to SOOMSPS.Functionally, the AD9006
Eand AD9016 use "flash" architecture; the outputs of 64 parallel
comparator stages are decoded to drive a bank of ECL output
TElatches.
""
:,,,, I
I
I
I
I
L
~----
(Dotted Area Not Included in AD9006)
The AD9006 and AD9016 are available as commercial tempera-
ture range devices: 0 to + 70°C; and military temperatUre range
The AD9006 features a bipolar analog input range (:t IV). Out-
devices: - 55°C to + 125°c. Both versions are offered in a ce-
put data is provided in a single 6-bit data bank; the data is ECL
compatible and also includes complementary Data Ready signals
and an overflow bit. ECL-Ievel control pins allow the user to
ramic 68-pin LCC, and a ceramic 68-pin leaded package.
The AD9006/AD9016 are available in versions compliant with
invert the MSB and/or LSBs. The AD9006 exhibits excellent
SNR performance (30dB SNR Ca.2:00MHz input), and requires
less than two watts of power.
MIL-STD-883. Refer to the Analog Devices Military Products
Databook or current AD9006/AD9016/883B data sheet for de-
tailed specifications
In the AD9016, the performance and features of the AD9006
are combined with on-board demultiplexing circuits. Output
data of the AD9016 are demultiplexed to two 6-bit data banks,
each of which includes a Data Ready signal and overflow bit.
REV.A
Information furnished by Analog Devices is believed to be accurate and
reliable. However. no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106. Norwood. MA 02062.9106. U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
Twx: 710/394-6577
Telex: 924491
Cable: ANALOG NORWOODMASS






AD9006 Datasheet, Funktion
-ANALOGDEVICES fAX-ON-DEMAND HOTLINE
Page 21
AD9006/AD9016
Signal-to-Noise Ratio (SNR)
The ratio of the rms signal arnplirude to the rms value of
"noise"> which is defined as the sum of all other spectral com-
ponents, including harmonics bUt excluding dc, with an analog
input signal IdB below full scale.
Transient Response
The time required for the converter to achieve 6-bit accuracy
when a full scale step function input is applied to the unit.
Two-Tone Intermodulation Distortion (IMD) Rejection
should be greater than - VREF; and the differential voltage be-
tween the references should not exceed 2.IV. MIDSCALE
VREF can be used to improve the integral linearityof the
converter.
Another attractive feature of the analog input characteristics of
the AD9016 is its low input capacitance of 8pF. In many other
flash converters, this value is three or four times larger> making
them difficult to drive at high input frequencies.
For those applications in which a single outpUt port is preferred,
the recommended choice is the AD9006 AID converter.
The ratio of the power of a tWo-tone signal to the power of the
strongest third-order IMD signal.
The AD9OO6is identical to the AD9016 in performance specifi-
cations; it is best suited for systems in which demultiplexing is
RECOMMENDED OPERATING CONDITIONS
not performed immediately after the flash converter. As in the
AD9016, the AD9006 produces Data Ready pulses on chip;
Parameter
+Vs
-Vs
+VREF
O-V REF
ANALOG INPUT
Input Voltage
Min Nominal Max
+4.75
-5.46
-V REF
-l.l
-1.0
+5.00
-5.20
+ 1.0
-1.0
+5.25
-4.94
+ 1.1
+ VREF
+1.0
BSTHEORY OF OPERATION
ORefer to the block diagram of the AD9016 AID converter.
"Flash" architecture used in the AD9006 and AD9016 units
Lmakes it unnecessary to use a track-and-hold (T/H) ahead of the
Econverter in many applications. The analog input signal is im-
pressed across 64 parallel comparator stages.
TEBias points of these comparators are established by the voltages
these can be used to clock external latches.
There are two control pins for determining the format of the
output data on the AD9006/AD9016. BIT INVERT (MSB) al-
lows the user to invert the most significant bit (DOs); and Do-
D4 INVERT allows the five least significant bits to be inverted.
The AD9006/AD9016 Truth Table elsewhere in the data sheet
provides the necessary information to select among binary, in-
verted binary, twos complement and inverted twos complement
coding schemes.
The OVERFLOW INHIBIT pin controls the overflow bit
(called out as OVERFLOW BIT in the AD9OO6,and OVER-
FLOW A and OVERFLOWB in the AD9016). In normal opera-
tion, the OVERFLOW INHIBIT is connected to -5.2V, and
OVERFLOW will be a digital HIGH whenever the analog inpUt
voltage exceeds the most positive comparator reference
(+ VSENSE)'The digital outputs (Do- Ds) will be LOW, i.e.,
returned-tv-zero operation.
applied to the reference ladder via + VREF>MIDSCALEREF and
This feature means two AD9OO6devices can be cascaded or
-VREF'
The outputs of the comparators are applied to the decoding
"stacked" to obtain seven-bit operation, as shown in the dia-
gram below.
logic; from here, the data are applied to oUtput latches as six
Connecting OVERFLOW INHIBIT to ground forces the
bits of digital data and an overflow bit. The overflow bit can be
overflow bit to remain low and disables the remrn-to-zer9
used to stack converters to obtain additional bits of resolution
operation.
and can also be used as a "flag" for indicating positive out-of-
range inputs.
Capturing output data at the (guaranteed) encode rates of
470MSPS of the AD9016 is simplified by virrue of using two
- .00 ""'NVERT
"sa INVERT13
~A~~~ 2
AD9016
,.) OVERFLOW A
Data Ready pulses. OUtput data words alternate between Bank
A and Bank B; this allows clocking demultiplexed data from the
AD9016 at half the converter's sample rate.
R
OUTPUT
L.A.TrC<H.".
The Data Ready pulses track the propagation delay of the out-
put data and relieve the need to build an external clock circuit
for tracking prop delay over the full operating temperatUre
range.
Demultiplexed ports connected to Bank A and Bank B allow the
user to capture oUtput data with lOOK ECL logic even when the
converter is operating at 470MSPS. The AD9016 introduces
only one pipeline delay in the processing of these digital output
data, thereby reducing the number of clock cycles required to
obtain the digital representation of the analog input at the ap-
propriate output port.
31) PAt. REAPY'
The analog input voltage range is determined by the user-
-supplied voltage references: + VREFand VREF' The references
can be adjusted between -I V and + IV. In all cases, + VREF
AD9016 Functional Block Diagram
(Dotted Area Not Included in AD9006)
REV. A
-7-

6 Page









AD9006 pdf, datenblatt
ANALOGDEVICES fAX-ON-DEMAND HOTLINE - Page 27
AD9006/AD9016
DIGITAL
GROUND
67:68
1011
+VSENse 7
R/2
R
A
-Vs -Vs
MIDSCALE J':"::\ 511
VREf 1601
R/2
R/2
Encode and Encode Equivalent Circuits
ODIGITAL 5 57
BGROUND'
16. 56 DIGITAL GROUND
~ SODIGITALBITS
I AND OVERFlOW
I
LI
ETEEquivalent Digital Outputs
R
1011
-VSENSE (65
R
A/2
=8011 1.25U
R=6'J
*
-'VV'v
= WIRING RESISTANCE =
.. =TO COMPARATORS
20
Reference Ladder
0
-20
... -40
ID
...
-60
-80
-100
DC
.+---
MH~
FFT of AD9006/AD9016
200
400MSPS: FIN =14.8MHz; V'N=1.0dB Below FS
0
-20
~... ~40
-60
-80
-100
DC
MH~
FFT 01 AD9006/AD9016
200
400MSPS: FIN=: 192MHz; VIN= 1.0dB Below FS
REV. A
-13-
- - .--

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