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AD7989-1 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD7989-1
Beschreibung 100 kSPS/500 kSPS PulSAR ADCs
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 24 Seiten
AD7989-1 Datasheet, Funktion
Data Sheet
18-Bit, 100 kSPS/500 kSPS
PulSAR ADCs in MSOP/LFCSP
AD7989-1/AD7989-5
FEATURES
GENERAL DESCRIPTION
Low power dissipation
AD7989-1
400 μW at 100 kSPS (VDD only)
700 μW at 100 kSPS (total)
AD7989-5
2 mW at 500 kSPS (VDD only)
3.5 mW at 500 kSPS (total)
18-bit resolution with no missing codes
Throughput: 100 kSPS (AD7989-1)/500 kSPS (AD7989-5)
INL: ±1 LSB typical, 2 LSB maximum
SNR: 98 dB at 1 kHz, VREF = 5 V
SINAD: 97 dB at 1 kHz
THD: −120 dB at 10 kHz
Dynamic range: 99 dB, VREF = 5 V
True differential analog input range: ±VREF
0 V to VREF with VREF between 2.4 V and 5.1 V
No pipeline delay
Single-supply 2.5 V operation with 1.8 V/2.5 V/3 V/5 V logic
interface
Proprietary serial interface: SPI-/QSPI™-/MICROWIRE™-/DSP-
compatible1
Ability to daisy-chain multiple ADCs
10-lead package: MSOP and 3 mm × 3 mm LFCSP
APPLICATIONS
Battery-powered equipment
Data acquisition systems
Medical instruments
Seismic data acquisition systems
The AD7989-1/AD7989-5 are 18-bit, successive approximation,
analog-to-digital converters (ADCs) that operate from a single
power supply, VDD. They contain a low power, high speed,
18-bit sampling ADC and a versatile serial interface port. On
the CNV rising edge, the AD7989-1/AD7989-5 sample the
voltage difference between the IN+ and IN− pins. The voltages
on these pins usually swing in opposite phases between 0 V and
VREF. The reference voltage, REF, is applied externally and can
be set independent of the supply voltage, VDD. Its power scales
linearly with throughput.
The AD7989-1/AD7989-5 are serial peripheral interface (SPI)
compatible, which features the ability, using the SDI input, to
daisy-chain several ADCs on a single 3-wire bus. It is compatible
with 1.8 V, 2.5 V, 3 V, and 5 V logic, using the separate VIO supply.
The AD7989-1/AD7989-5 are available in a 10-lead MSOP or a
10-lead LFCSP with operation specified from −40°C to +85°C.
Table 1. MSOP, LFCSP 14-/16-/18-Bit PulSAR® ADCs
Bits 100 kSPS 250 kSPS 400 kSPS to 500 kSPS ≥1000 kSPS
181 AD7989-12 AD76912 AD76902
AD79822
AD7989-52
AD79842
161 AD7684
AD76872 AD76882
163 AD7680
AD76852
AD76932
AD76862
AD79802
AD7683
AD7694 AD7988-52
AD79832
AD7988-12
143 AD7940
AD79422 AD79462
1 True differential.
2 Pin-for-pin compatible.
3 Pseudo differential.
TYPICAL APPLICATIONS CIRCUIT
2.5V TO 5V 2.5V
±10V, ±5V, ..
ADA4941-1
REF VDD VIO
IN+ SDI/CS
AD7989-1/ SCK
AD7989-5
IN–
SDO
GND CNV
Figure 1.
1.8V TO 5.5V
3- OR 4-WIRE
INTERFACE
(SPI, CS,
DAISY CHAIN)
1 Protected by U.S. Patent 6,703,961.
Rev. A
Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD7989-1 Datasheet, Funktion
AD7989-1/AD7989-5
500µA IOL
TO SDO
CL
20pF
1.4V
500µA IOH
Figure 2. Load Circuit for Digital Interface Timing
X% VIO1
tDELAY
VIH2
VIL2
Y% VIO1
tDELAY
VIH2
VIL2
1FOR VIO ≤ 3.0V, X = 90 AND Y = 10; FOR VIO > 3.0V, X = 70 AND Y = 30.
2MINIMUM VIH AND MAXIMUM VIL USED. SEE DIGITAL INPUTS
SPECIFICATIONS IN TABLE 3.
Figure 3. Voltage Levels for Timing
Data Sheet
Rev. A | Page 6 of 24

6 Page









AD7989-1 pdf, datenblatt
AD7989-1/AD7989-5
TERMINOLOGY
Integral Nonlinearity Error (INL)
INL refers to the deviation of each individual code from a line
drawn from negative full scale through positive full scale. The
point used as negative full scale occurs ½ LSB before the first
code transition. Positive full scale is defined as a level 1½ LSB
beyond the last code transition. The deviation is measured from
the middle of each code to the true straight line (see Figure 25).
Differential Nonlinearity Error (DNL)
In an ideal ADC, code transitions are 1 LSB apart. DNL is the
maximum deviation from this ideal value. It is often specified in
terms of resolution for which no missing codes are guaranteed.
Zero Error
Zero error is the difference between the ideal midscale voltage,
that is, 0 V, and the actual voltage producing the midscale
output code, that is, 0 LSB.
Gain Error
The first transition (from 100 … 00 to 100 …01) should occur
at a level ½ LSB above nominal negative full scale (−4.999981 V
for the ±5 V range). The last transition (from 011 … 10 to
011 … 11) occurs for an analog voltage 1½ LSB below the
nominal full scale (+4.999943 V for the ±5 V range). The gain
error is the deviation of the difference between the actual level
of the last transition and the actual level of the first transition from
the difference between the ideal levels.
Spurious-Free Dynamic Range (SFDR)
SFDR is the difference, in decibels (dB), between the rms
amplitude of the input signal and the peak spurious signal.
Effective Number of Bits (ENOB)
ENOB is a measurement of the resolution with a sine wave
input. It is related to SINAD as follows:
ENOB = (SINADdB − 1.76)/6.02
and is expressed in bits.
Noise-Free Code Resolution
Noise-free code resolution is the number of bits beyond which it is
impossible to distinctly resolve individual codes. It is calculated as
Noise-Free Code Resolution = log2(2N/Peak-to-Peak Noise)
Data Sheet
and is expressed in bits.
Effective Resolution
Effective resolution is calculated as
Effective Resolution = log2(2N/RMS Input Noise)
and is expressed in bits.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first five harmonic
components to the rms value of a full-scale input signal and is
expressed in decibels.
Dynamic Range
Dynamic range is the ratio of the rms value of the full scale to
the total rms noise measured with the inputs shorted together.
The value for dynamic range is expressed in decibels. It is
measured with a signal at −60 dB so that it includes all noise
sources and DNL artifacts.
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the actual input signal to the
rms sum of all other spectral components below the Nyquist
frequency, excluding harmonics and dc. The value for SNR is
expressed in decibels.
Signal-to-Noise-and-Distortion (SINAD) Ratio
SINAD is the ratio of the rms value of the actual input signal to
the rms sum of all other spectral components that are less than
the Nyquist frequency, including harmonics but excluding dc.
The value of SINAD is expressed in decibels.
Aperture Delay
Aperture delay is the measure of the acquisition performance
and is the time between the rising edge of the CNV input and
when the input signal is held for a conversion.
Transient Response
Transient response is the time required for the ADC to accurately
acquire its input after a full-scale step function is applied.
Rev. A | Page 12 of 24

12 Page





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