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AD7902 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD7902
Beschreibung 1 MSPS PulSAR ADC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 29 Seiten
AD7902 Datasheet, Funktion
Data Sheet
Dual Pseudo Differential 16-Bit, 1 MSPS
PulSAR ADC 12.0 mW in QSOP
AD7902
FEATURES
GENERAL DESCRIPTION
16-bit resolution with no missing codes
The AD7902 is a dual 16-bit, successive approximation, analog-
Throughput: 1 MSPS
to-digital converter (ADC) that operates from a single power
Low power dissipation
supply, VDDx, per ADC. It contains two low power, high speed,
7.0 mW at 1 MSPS (VDD1 and VDD2 only)
12.0 mW at 1 MSPS (total)
16-bit sampling ADCs and a versatile serial port interface (SPI).
On the CNVx rising edge, the AD7902 samples an analog input,
140 µW at 10 kSPS
INL: ±1.0 LSB typical, ±2.5 LSB maximum
IN+, in the range of 0 V to VREF with respect to a ground sense,
IN−. The externally applied reference voltage of the REFx pins
SINAD: 91 dB at 1 kHz
THD: −105 dB at 1 kHz
Pseudo differential analog input range
0 V to VREF with VREF between 2.4 V to 5.1 V
Allows use of any input range
Easy to drive with the ADA4841-1/ADA4841-2
No pipeline delay
Single-supply 2.5 V operation with 1.8 V/2.5 V/3 V/5 V logic
interface
(VREF) can be set independently from the supply voltage pins,
VDDx. The power of the device scales linearly with throughput.
Using the SDIx inputs, the SPI-compatible serial interface can
also daisy-chain multiple ADCs on a single 3-wire bus and provide
an optional busy indicator. It is compatible with 1.8 V, 2.5 V, 3 V,
or 5 V logic, using the separate VIOx supplies.
The AD7902 is available in a 20-lead QSOP package with
operation specified from −40°C to +125°C.
Serial port interface (SPI) QSPI/MICROWIRE/DSP compatible
20-lead QSOP package
Wide operating temperature range: −40°C to +125°C
Table 1. MSOP 14-/16-/18-Bit PulSAR® ADCs
400 kSPS
Bits 100 kSPS 250 kSPS to 500 kSPS 1000 kSPS ADC Driver
APPLICATIONS
18
AD76911 AD76901
AD79821 ADA4941-1
ADA4841-1
Battery-powered equipment
ADA4841-2
Communications
Automated test equipment (ATE)
Data acquisition
Medical instrumentation
16 AD7680 AD76851 AD76861
AD7683 AD76871 AD76881
AD7684 AD7694 AD76931
14 AD7940 AD79421 AD79461
AD79801
AD7903
AD7902
ADA4941-1
ADA4841-1
ADA4841-2
Redundant measurement
Simultaneous sampling
1 Pin-for-pin compatible.
FUNCTIONAL BLOCK DIAGRAM
REF = 2.5V TO 5V
2.5V
0V TO VREF
0V TO VREF
REF1 REF2 VDD1 VDD2
IN1+
ADC1
IN1–
VIO1
SDI1
SCK1
CNV1
SDO1
IN2+
ADC2
IN2–
VIO2
SDI2
SCK2
CNV2
SDO2
GND AD7902
VIO1/VIO2
SDI1/SDI2
SCK1/SCK2
CNV1/CNV2
SDO1
3-WIRE OR 4-WIRE
INTERFACE
(SPI, CS, AND
CHAIN MODES)
SDO2
Figure 1.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD7902 Datasheet, Funktion
Data Sheet
AD7902
TIMING SPECIFICATIONS
−40°C to +125°C, VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, unless otherwise stated. See Figure 2 and Figure 3 for load conditions. See
Figure 39, Figure 41, Figure 43, Figure 45, Figure 47, Figure 49, and Figure 51 for timing diagrams.
Table 4.
Parameter
Conversion Time (CNVx Rising Edge to Data Available)
Acquisition Time
Time Between Conversions
VIOx Above 2.3 V
CNVx Pulse Width (CS Mode)
SCKx Period (CS Mode)
VIOx Above 4.5 V
VIOx Above 3 V
VIOx Above 2.7 V
VIOx Above 2.3 V
SCKx Period (Chain mode)
VIOx Above 4.5 V
VIOx Above 3 V
VIOx Above 2.7 V
VIOx Above 2.3 V
SCKx Low Time
SCKx High Time
SCKx Falling Edge to Data Remains Valid
SCKx Falling Edge to Data Valid Delay
VIOx Above 4.5 V
VIOx Above 3 V
VIOx Above 2.7 V
VIOx Above 2.3 V
CNVx or SDIx Low to SDOx, D15 (MSB) Valid (CS Mode)
VIOx Above 3 V
VIOx Above 2.3 V
CNVx or SDIx High or Last SCKx Falling Edge to SDOx High Impedance (CS Mode)
SDIx Valid Setup Time from CNVx Rising Edge(CS Mode)
SDIx Valid Hold Time from CNVx Rising Edge (CS Mode)
SCKx Valid Setup Time from CNVx Rising Edge (Chain Mode)
SCKx Valid Hold Time from CNVx Rising Edge (Chain Mode)
SDIx Valid Setup Time from SCKx Falling Edge (Chain Mode)
SDIx Valid Hold Time from SCKx Falling Edge (Chain Mode)
SDIx High to SDOx High (Chain Mode with Busy Indicator)
Symbol Min
Typ Max Unit
tCONV
tACQ
tCYC
500
290
1000
710 ns
ns
ns
tCNVH
tSCK
10
10.5
ns
ns
12 ns
13 ns
15 ns
tSCK
11.5
ns
13 ns
14 ns
16 ns
tSCKL
tSCKH
tHSDO
tDSDO
4.5
4.5
3
ns
ns
ns
9.5 ns
11 ns
12 ns
14 ns
tEN
10 ns
15 ns
tDIS
tSSDICNV
tHSDICNV
tSSCKCNV
tHSCKCNV
tSSDISCK
tHSDISCK
tDSDOSDI
5
2
5
5
2
3
20 ns
ns
ns
ns
ns
ns
ns
15 ns
500µA IOL
TO SDOx
CL
20pF
1.4V
500µA IOH
Figure 2. Load Circuit for Digital Interface Timing
X% VIOx1
tDELAY
VIH2
VIL2
Y% VIOx1
tDELAY
VIH2
VIL2
1FOR VIOx ≤ 3.0V, X = 90 AND Y = 10; FOR VIOx > 3.0V, X = 70 AND Y = 30.
2MINIMUM VIH AND MAXIMUM VIL USED. SEE SPECIFICATIONS FOR DIGITAL
INPUTS PARAMETER IN TABLE 3.
Figure 3. Voltage Levels for Timing
Rev. B | Page 5 of 28

6 Page









AD7902 pdf, datenblatt
Data Sheet
1.4
IVDD
1.2
1.0
0.8
0.6
IREF
0.4
IVIO
0.2
0
–55 –35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 23. Operating Currents for Each ADC vs. Temperature
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–55 –35 –15
5
25 45 65
85 105 125
TEMPERATURE (°C)
Figure 24. Zero Error vs. Temperature
0.05
0.03
0.01
–0.01
–0.03
–0.05
–55 –35 –15
5
25 45 65
85 105 125
TEMPERATURE (°C)
Figure 25. Gain Error vs. Temperature
AD7902
8
7
6
5
4
3 IVDD + IVIO
2
1
0
–55 –35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 26. Power-Down Current for Each ADC vs. Temperature
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–55
–35 –15 5 25 45 65 85 105
TEMPERATURE (°C)
Figure 27. Zero Error Match vs. Temperature
125
0.010
0.005
0
–0.005
–0.010
–55
–35 –15 5 25 45 65 85 105
TEMPERATURE (°C)
Figure 28. Gain Error Match vs. Temperature
125
Rev. B | Page 11 of 28

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