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PDF AD9879 Data sheet ( Hoja de datos )

Número de pieza AD9879
Descripción Cable Modem
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
Low cost 3.3 V MxFE™ for
DOCSIS-, EURO-DOCSIS-, DVB-, DAVIC-compliant
set-top box and cable modem applications
232 MHz quadrature digital upconverter
12-bit direct IF DAC (TxDAC+™)
Up to 65 MHz carrier frequency DDS
Programmable sampling clock rates
16× upsampling interpolation LPF
Single-tone frequency synthesis
Analog Tx output level adjust
Direct cable amp interface
12-bit, 33 MSPS direct IF ADC
with optional video clamping input
10-bit, 33 MSPS direct IF ADC
Dual 7-bit, 16.5 MSPS sampling I/Q ADC
12-bit Σ-∆ auxiliary DAC
APPLICATIONS
Cable modem and satellite systems
Set-top boxes
Power line modem
PC multimedia
Digital communications
Data and video modems
QAM, OFDM, FSK modulation
GENERAL DESCRIPTION
The AD9879 is a single-supply set-top box and cable modem
mixed-signal front end. The device contains a transmit path
interpolation filter, complete quadrature digital upconverter,
and transmit DAC. The receive path contains a 12-bit ADC, a
10-bit ADC, and dual 7-bit ADCs. All internally required clocks
and an output system clock are generated by the phase-locked
loop (PLL) from a single crystal or clock input.
The transmit path interpolation filter provides an upsampling
factor of 16× with an output signal bandwidth as high as
8.3 MHz. Carrier frequencies up to 65 MHz with 26 bits of
frequency tuning resolution can be generated by the direct
digital synthesizer (DDS). The transmit DAC resolution is
12 bits and can run at sampling rates as high as 232 MSPS.
Analog output scaling from 0.0 dB to 7.5 dB in 0.5 dB steps is
available to preserve SNR when reduced output levels are
required.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Mixed-Signal Front End
Set-Top Box, Cable Modem
AD9879
FUNCTIONAL BLOCK DIAGRAM
TX DATA
I
TX Q 16
12
SINC–1
DAC
TX
DDS
SPORT
4
CONTROL REGISTERS
Σ-
PLL
XM/N
Σ-_OUT
CA_PORT
MCLK
RXIQ[3:0]
MUX
8
ADC
MUX
2
2
RXI
RXQ
10
ADC
RXIF[11:0]
MUX
12
ADC
AD9879
MUX
CLAMP
Figure 1.
RX10
RX12
VIDEO
The 12-bit and 10-bit IF ADCs can convert direct IF inputs up
to 70 MHz and run at sample rates up to 33 MSPS. A video
input with an adjustable signal clamping level, along with the
10-bit ADC, allow the AD9879 to process an NTSC and a QAM
channel simultaneously.
The programmable Σ-Δ DAC can be used to control external
components, such as variable gain amplifiers (VGAs) or voltage
controlled tuners. The CA port provides an interface to the
AD8321/AD8323 or AD8322/AD8327 programmable gain
amplifier (PGA) cable drivers, enabling host processor control
via the MxFE SPORT.
The AD9879 is available in a 100-lead MQFP. It offers enhanced
receive path undersampling performance and lower cost when
compared with the pin-compatible AD9873. The AD9879 is
specified over the commercial (−40°C to +85°C) temperature
range.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.

1 page




AD9879 pdf
AD9879
SPECIFICATIONS
VAS = 3.3 V ± 5%, VDS = 3.3 V ± 10%, fOSCIN = 27 MHz, fSYSCLK = 216 MHz, fMCLK = 54 MHz (M = 8), ADC clock from OSCIN,
RSET = 4.02 kΩ, 75 Ω DAC load, unless otherwise noted.
Table 1.
Parameter
OSCIN AND XTAL CHARACTERISTICS
Frequency Range
Duty Cycle
Input Impedance
MCLK Cycle to Cycle Jitter
Tx DAC CHARACTERISTICS
Resolution
Maximum Sample Rate
Full-Scale Output Current
Gain Error (Using Internal Reference)
Offset Error
Reference Voltage (REFIO Level)
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Output Capacitance
Phase Noise @ 1 kHz Offset, 42 MHz
Crystal and OSCIN Multiplier Enabled at 16×
Output Voltage Compliance Range
Wideband SFDR
5 MHz Analog Out, IOUT = 10 mA
65 MHz Analog Out, IOUT = 10 mA
Narrow-band SFDR (±1 MHz Window)
5 MHz Analog Out, IOUT = 10 mA
Tx MODULATOR CHARACTERISTICS
I/Q Offset
Pass-Band Amplitude Ripple (f < fIQCLK/8)
Pass-Band Amplitude Ripple (f < fIQCLK/4)
Stop-Band Response (f > fIQCLK × 3/4)
Tx GAIN CONTROL
Gain Step Size
Gain Step Error
Settling Time to 1% (Full-Scale Step)
IQ ADC CHARACTERISTICS
Resolution1
Maximum Conversion Rate
Pipeline Delay
Offset Matching Between I and Q ADCs
Gain Matching Between I and Q ADCs
Analog Input
Input Voltage Range1
Input Capacitance
Differential Input Resistance
AC Performance (AIN = 0.5 dBFS, fIN = 5 MHz)
Effective Number of Bits (ENOB)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Spurious-Free Dynamic Range (SFDR)
Temp Test Level Min
Full II
Full II
25°C III
25°C III
3
35
N/A N/A
Full II
Full II
25°C I
25°C I
25°C I
25°C III
25°C III
25°C III
232
4
−2.0
1.18
25°C III
Full II
−0.5
Full III
Full III
60.8
44.0
Full III
65.4
Full II
Full II
Full II
Full II
50
25°C III
25°C III
25°C III
N/A N/A
Full II
N/A N/A
Full III
Full III
14.5
Full III
25°C III
25°C III
25°C I
25°C I
25°C I
25°C I
5.00
34.7
41.3
Typ
50
100||3
6
12
10
−1.0
±1.0
1.23
±2.5
±8
5
−110
66.9
46.2
72.3
55
0.5
<0.05
1.8
6
3.5
±4.0
±2.0
1
2.0
4
5.8
36.5
−50
51
Max
29
65
20
+2.0
1.28
+1.5
±0.1
±0.5
−63
−36.2
Unit
MHz
%
MΩ||pF
ps rms
Bits
MHz
mA
% FS
% FS
V
LSB
LSB
pF
dBc/Hz
V
dBc
dBc
dBc
dB
dB
dB
dB
dB
dB
µs
Bits
MHz
ADC cycles
LSBs
LSBs
Vppd
pF
kΩ
Bits
dB
dB
dB
Rev. A | Page 4 of 32

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AD9879 arduino
AD9879
TERMINOLOGY
Aperture Delay
The aperture delay is a measure of the sample-and-hold
amplifier (SHA) performance. It specifies the time delay
between the rising edge of the sampling clock input and when
the input signal is held for conversion.
Aperture Uncertainty (Jitter)
Aperture jitter is the variation in aperture delay for successive
samples. It is manifested as noise on the input to the ADC.
Channel-to-Channel Isolation (Crosstalk)
In an ideal multichannel system, the signal in one channel does
not influence the signal level of another channel. The channel-
to-channel isolation specification is a measure of the change
that occurs to a grounded channel as a full-scale signal is
applied to another channel.
Differential Nonlinearity Error (DNL, No Missing Codes)
An ideal converter exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Guaranteed
no missing codes to 10-bit resolution indicates that all 1,024
codes, respectively, must be present over all operating ranges.
Effective Number of Bits (ENOB)
For a sine wave, SINAD can be expressed in terms of the
number of bits. Using the formula
N = (SINAD − 1.76 dB∕6.02)
it is possible to determine a measure of performance expressed
as N, the effective number of bits. Thus, the effective number of
bits for a device’s sine wave inputs at a given input frequency
can be calculated directly from its measured SINAD.
Gain Error
The first code transition should occur at an analog value
1/2 LSB above full scale. The last transition should occur for an
analog value 1 1/2 LSB below the nominal full scale. Gain error
is the deviation of the actual difference between the first and
last code transitions and the ideal difference between the first
and last code transitions.
Input Referred Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output code is calculated in
LSB and converted to an equivalent voltage. This results in a
noise figure that can be directly referred to the input of the MxFE.
Integral Nonlinearity Error (INL)
Linearity error refers to the deviation of each individual code
from a line drawn from negative full scale through the positive
full scale. The point used as the negative full scale occurs
1/2 LSB before the first code transition. Positive full scale is
defined as a level 1 1/2 LSB beyond the last code transition. The
deviation is measured from the middle of each code to the true
straight line.
Offset Error
First transition should occur for an analog value 1/2 LSB
above −FS. Offset error is defined as the deviation of the actual
transition from that point.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits can
cause either output stage saturation or break down, resulting in
nonlinear performance.
Phase Noise
Single-sideband phase noise power is specified relative to the
carrier (dBc/Hz) at a given frequency offset (1 kHz) from the
carrier. Phase noise can be measured directly in single-tone
transmit mode with a spectrum analyzer that supports noise
marker measurements. It detects the relative power between the
carrier and the offset (1 kHz) sideband noise and takes the
resolution bandwidth (RBW) into account by subtracting
10 log(RBW). It also adds a correction factor that compensates
for the implementation of the resolution bandwidth, log display,
and detector characteristic.
Pipeline Delay (Latency)
Pipeline delay is the number of clock cycles between conversion
initiation and the availability of the associated output data.
Power Supply Rejection
Power supply rejection specifies the converter’s maximum full-
scale change when the supplies are varied from nominal to
minimum and maximum specified voltages.
Signal-to-Noise and Distortion (SINAD) Ratio
SINAD is the ratio of the rms value of the measured input
signal to the rms sum of all other spectral components below
the Nyquist frequency, including harmonics but excluding dc.
The value for SINAD is expressed in decibels.
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the measured input signal to
the rms sum of all other spectral components below the Nyquist
frequency, excluding harmonics and dc. The value for SNR is
expressed in decibels.
Spurious-Free Dynamic Range (SFDR)
SFDR is the difference, in dB, between the rms amplitude of the
DAC output signal (or the ADC input signal) and the peak
spurious signal over the specified bandwidth (Nyquist
bandwidth, unless otherwise noted).
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured input signal, and
is expressed as a percentage or in decibels.
Rev. A | Page 10 of 32

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