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CD4019BC Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer CD4019BC
Beschreibung Quad AND-OR Select Gate
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 6 Seiten
CD4019BC Datasheet, Funktion
October 1987
Revised January 1999
CD4019BC
Quad AND-OR Select Gate
General Description
The CD4019BC is a complementary MOS quad AND-OR
select gate. Low power and high noise margin over a wide
voltage range is possible through implementation of N- and
P-channel enhancement mode transistors. These comple-
mentary MOS (CMOS) transistors provide the building
blocks for the 4 “AND-OR select” gate configurations, each
consisting of two 2-input AND gates driving a single 2-input
OR gate. Selection is accomplished by control bits KA and
KB. All inputs are protected against static discharge dam-
age.
Features
s Wide supply voltage range: 3.0V to 15V
s High noise immunity: 0.45 VDD (typ.)
s Low power TTL compatibility: Fan out of 2 driving 74L
or 1 driving 74LS
Applications
• AND-OR select gating
• Shift-right/shift-left registers
• True/complement selection
• AND/OR/EXCLUSIVE-OR selection
Ordering Code:
Order Number Package Number
Package Description
CD4019BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
CD4019BCSJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4019BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC and SOP
Top View
© 1999 Fairchild Semiconductor Corporation DS005952.prf
www.fairchildsemi.com






CD4019BC Datasheet, Funktion
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assumeany responsibility for use of any circuitry described, no circuit patent licenses are impliedandFairchildreserves theright at any timewithout noticetochange saidcircuitry andspecifications.

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