|
|
Teilenummer | DG412L |
|
Beschreibung | Precision Monolithic Quad SPST Low-Voltage CMOS Analog Switches | |
Hersteller | Vishay | |
Logo | ||
Gesamt 15 Seiten DG411L, DG412L, DG413L
Vishay Siliconix
Precision Monolithic Quad SPST
Low-Voltage CMOS Analog Switches
DESCRIPTION
The DG411L, DG412L, DG413L are low voltage pin-for-pin
compatible companion devices to the industry standard
DG411, DG412, DG413 with improved performance.
Using BiCMOS wafer fabrication technology allows the
DG411L, DG412L, DG413L to operate on single and dual
supplies. Single supply voltage ranges from 3 to 12 V while
dual supply operation is recommended with ± 3 to ± 6 V.
Combining high speed (tON: 19 ns), flat RDS(on) over the
analog signal range (5 ), minimal insertion lose (- 3 dB at
280 MHz), and excellent crosstalk and off-isolation
performance (- 50 dB at 50 MHz), the DG411L, DG412L,
DG413L are ideally suited for audio and video signal
switching.
The DG411L and DG412L respond to opposite control logic
as shown in the Truth Table. The DG413L has two normally
open and two normally closed switches.
FEATURES
• 2.7- thru 12 V single supply or
± 3- thru ± 6 dual supply
• On-resistance - RDS(on): 17
• Fast switching - tON: 19 ns
• tOFF: 12 ns
• TTL, CMOS compatible
• Low leakage: 0.25 nA
• 2000 V ESD protection
BENEFITS
• Widest dynamic range
• Low signal errors and distortion
• Break-before-make switching action
• Simple interfacinge
APPLICATIONS
• Precision automatic test equipment
• Precision data acquisition
• Communication systems
• Battery powered systems
• Computer peripherals
• SDSL, DSLAM
• Audio and video signal routing
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG411L, DG412L
Dual-In-Line, TSSOP and SOIC
IN1 1
D1 2
S1 3
V- 4
GND 5
S4 6
D4 7
IN4 8
16 IN2
15 D2
14 S2
13 V+
12 VL
11 S3
10 D3
9 IN3
DG413L
Dual-In-Line, TSSOP and SOIC
IN1 1
D1 2
S1 3
V- 4
GND 5
S4 6
D4 7
IN4 8
16 IN2
15 D2
14 S2
13 V+
12 VL
11 S3
10 D3
9 IN3
Available
RoHS*
COMPLIANT
Top View
TRUTH TABLE
Logic
0
1
DG411L
ON
OFF
DG412L
OFF
ON
TRUTH TABLE
Logic
0
1
Logic “0” 0.8 V
Logic “1” 2.4 V
Logic “0” 0.8 V
Logic “1” 2.4 V
* Pb containing terminations are not RoHS compliant, exemptions may apply
Top View
SW1, SW4
OFF
ON
SW2, SW3
ON
OFF
Document Number: 71397
S11-0179-Rev. F, 07-Feb-11
www.vishay.com
1
DG411L, DG412L, DG413L
Vishay Siliconix
SPECIFICATIONSa (Single Supply 3 V)
Parameter
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
Switch Off
Leakage Currentg
Channel On
Leakage Currentg
Digital Control
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 3 V, V- = 0 V
VL = 3 V, VIN = 0.4 Vf
A Suffix Limits D Suffix Limits
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.b Typ.c Min.d Max.d Min.d Max.d
Unit
VANALOG
RDS(on)
IS(off)
ID(off)
ID(on)
V+ = 2.7 V, V- = 0 V
IS = 5 mA, VD = 0.5, 2.2 V
V+ = 3.3 , V- = 0 V
VD = 1, 2 V, VS = 2, 1 V
V+ = 3.3 V, V- = 0 V
VS = VD = 1, 2 V
Full
Room
Full
Room
Full
Room
Full
Room
Full
65
0 3 0 3V
80
115
80
100
-1 1 -1 1
- 15 15 - 10 10
-1
- 15
1
15
-1
- 10
1
10
nA
-1 1 -1 1
- 15 15 - 10 10
Input Current, VIN Low
Input Current, VIN High
Dynamic Characteristics
IIL
IIH
VIN under test = 0.4 V
VIN under test = 2.4 V
Full 0.005 - 1.5
Full 0.005 - 1.5
1.5
1.5
-1
-1
1
µA
1
Turn-On Time
Turn-Off Time
tON
RL = 300 , CL = 35 pF
Room
Full
50
tOFF
VS = 1.5 V, see figure 2
Room
Full
30
85 85
150 110
60
100
60
85
ns
Break-Before-Make Time
Delay
Charge Injectione
Off Isolatione
Channel-to-Channel
Crosstalke
Source Off Capacitancee
Drain Off Capacitancee
Channel On Capacitancee
tD
Q
OIRR
XTALK
CS(off)
CD(off)
CD(on)
DG413L only, VS = 1.5 V
RL = 300 , CL = 35 pF
Vg = 0 V, Rg = 0 , CL = 10 nF
RL = 50 , CL = 5 pF , f = 1 MHz
Room
Room
Room
Room
f = 1 MHz
Room
Room
Room
6
1
68
85
6
6
20
pC
dB
pF
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. Leakage parameters are guaranteed by worst case test conditions and not subject to test.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
6
Document Number: 71397
S11-0179-Rev. F, 07-Feb-11
6 Page TSSOP: 16-LEAD
Package Information
Vishay Siliconix
Symbols
A
A1
A2
B
C
D
E
E1
e
L
L1
y
θ1
ECN: S-61920-Rev. D, 23-Oct-06
DWG: 5624
Min
-
0.05
-
0.22
-
4.90
6.10
4.30
-
0.50
0.90
-
0°
DIMENSIONS IN MILLIMETERS
Nom
1.10
0.10
1.00
0.28
0.127
5.00
6.40
4.40
0.65
0.60
1.00
-
3°
Max
1.20
0.15
1.05
0.38
-
5.10
6.70
4.50
-
0.70
1.10
0.10
6°
Document Number: 74417
23-Oct-06
www.vishay.com
1
12 Page | ||
Seiten | Gesamt 15 Seiten | |
PDF Download | [ DG412L Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
DG412 | Monolithic Quad SPST / CMOS Analog Switches | Intersil Corporation |
DG412 | SPST Analog Switches | Maxim Integrated |
DG412 | Precision Monolithic Quad SPST CMOS Analog Switches | Vishay |
DG412F | SPST Analog Switches | Maxim Integrated |
DG412L | Precision Monolithic Quad SPST Low-Voltage CMOS Analog Switches | Vishay |
Teilenummer | Beschreibung | Hersteller |
CD40175BC | Hex D-Type Flip-Flop / Quad D-Type Flip-Flop. |
Fairchild Semiconductor |
KTD1146 | EPITAXIAL PLANAR NPN TRANSISTOR. |
KEC |
www.Datenblatt-PDF.com | 2020 | Kontakt | Suche |