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CD4002BMS Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer CD4002BMS
Beschreibung CMOS NOR Gate
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 9 Seiten
CD4002BMS Datasheet, Funktion
CD4000BMS, CD4001BMS
CD4002BMS, CD4025BMS
November 1994
CMOS NOR Gate
Features
Pinouts
• High-Voltage Types (20V Rating)
• Propagation Delay Time = 60ns (typ.) at CL = 50pF,
VDD = 10V
• Buffered Inputs and Outputs
• Standard Symmetrical Output Characteristics
• 100% Tested for Maximum Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack-
age-Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Stan-
dards No. 13B, “Standard Specifications for Descrip-
tion of “B” Series CMOS Device’s
Description
CD4000BMS
CD4001BMS
CD4002BMS
CD4025BMS
- Dual 3 Plus Inverter
- Quad 2 Input
- Dual 4 Input
- Triple 3 Input
CD4000BMS
TOP VIEW
NC 1
14 VDD
NC 2
13 F
A3
12 E
B4
11 D
C5
10 K = D + E + F
H=A+B+C 6
9 L=G
VSS 7
8G
NC = NO CONNECTION
CD4001BMS
TOP VIEW
A1
14 VDD
B2
13 H
J=A+B 3
12 G
K=C+D 4
11 M = G + H
C5
10 L = E + F
D6
9F
VSS 7
8E
NC = NO CONNECTION
CD4002BMS
TOP VIEW
CD4000BMS, CD4001BMS, CD4002BMS, and
CD4025BMS NOR gates provide the system designer with
direct implementation of the NOR function and supplement
the existing family of CMOS gates. All inputs and outputs are
buffered.
The CD4000BMS, CD4001BMS, CD4002BMS and the
CD4025BMS is supplied in these 14 lead outline packages:
CD4000B CD4001B CD4002B CD4025B
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4X
H1B
H3W
H4Q
H1B
H3W
H4Q
H1B
H3W
H4Q
H1B
H3W
J=A+B+C+D 1
14 VDD
A2
13 K = E + F + G + H
B3
12 H
C4
11 G
D5
10 F
NC 6
9E
VSS 7
8 NC
NC = NO CONNECTION
CD4025BMS
TOP VIEW
A1
B2
D3
14 VDD
13 G
12 H
E4
F5
K=D+E+F 6
VSS 7
11 I
10 L = G + H + I
9 J=A+B+C
8C
NC = NO CONNECTION
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-649
File Number 3289






CD4002BMS Datasheet, Funktion
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
PART NUMBER CD4000BMS
Static Burn-In 1
Note 1
1, 2, 6, 9, 10
3 - 5, 7, 8, 11 - 13
14
Static Burn-In 2
Note 1
1, 2, 6, 9, 10
7 3 - 5, 8, 11 - 14
Dynamic Burn-
In Note 1
1, 2
7
14
6, 9, 10
3 - 5, 8, 11 - 13
Irradiation
Note 2
1, 2, 6, 9, 10
7 3 - 5, 8, 11 - 14
PART NUMBER CD4001BMS
Static Burn-In 1
Note 1
3, 4, 10, 11
1, 2, 5 - 9, 12, 13
14
Static Burn-In 2
Note 1
3, 4, 10, 11
7 1, 2, 5, 6, 8, 9,
12 - 14
Dynamic Burn-
In Note 1
-
7
14
3, 4, 10, 11
1, 2, 5, 6, 8, 9,
12, 13
Irradiation
Note 2
3, 4, 10, 11
7 1, 2, 5, 6, 8, 9,
12 - 14
PART NUMBER CD4002BMS
Static Burn-In 1
Note 1
1, 6, 8, 13
2 - 5, 7, 9 - 12
14
Static Burn-In 2
Note 1
1, 6, 8, 13
7 2 - 5, 9 - 12, 14
Dynamic Burn-
In Note 1
6, 8
7
14
1, 13
2 - 5, 9 - 12
Irradiation
Note 2
1, 6, 8, 13
7 2 - 5, 9 - 12, 14
PART NUMBER CD4025BMS
Static Burn-In 1
Note 1
6, 9, 10
1 - 5, 7, 8, 11 - 13
14
Static Burn-In 2
Note 1
6, 9, 10
7 1 - 5, 8, 11 - 14
Dynamic Burn-
In Note 1
-
7
14
6, 9, 10
1 - 5, 8, 11 - 13
Irradiation
Note 2
6, 9, 10
7 1 - 5, 8, 11 - 14
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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