Datenblatt-pdf.com


ADP7157 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADP7157
Beschreibung RF Linear Regulator
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 24 Seiten
ADP7157 Datasheet, Funktion
Data Sheet
1.2 A, Ultralow Noise,
High PSRR, RF Linear Regulator
ADP7157
FEATURES
Input voltage range: 2.3 V to 5.5 V
Adjustable output voltage range (VOUT): 1.2 V to 3.3 V
Maximum load current: 1.2 A
Low noise
0.9 µV rms typical output noise from 100 Hz to 100 kHz
1.6 µV rms typical output noise from 10 Hz to 100 kHz
Noise spectral density: 1.7 nV/√Hz from 10 kHz to 1 MHz
Power supply rejection ratio (PSRR)
82 dB from 1 kHz to 100 kHz
55 dB at 1 MHz
Dropout voltage: 120 mV typical at IOUT = 1.2 A, VOUT = 3.3 V
Initial accuracy: ±0.6% at ILOAD = 10 mA
Accuracy over line, load, and temperature: ±1.5%
Operating supply current (IGND)
4.0 mA typical at 0 µA
7.0 mA typical at 1.2 A
Low shutdown current: 0.2 μA typical
Stable with a 10 µF ceramic output capacitor
10-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages
Precision enable
Supported by ADIsimPower tool
APPLICATIONS
Regulation to noise sensitive applications: phase-locked
loops (PLLs), voltage controlled oscillators (VCOs), and
PLLs with integrated VCOs
Communications and infrastructure
Backhaul and microwave links
GENERAL DESCRIPTION
The ADP7157 is an adjustable linear regulator that operates from
2.3 V to 5.5 V and provides up to 1.2 A of output current. Output
voltages from 1.2 V to 3.3 V are possible depending on the model.
Using an advanced proprietary architecture, the device provides
high power supply rejection and ultralow noise, achieving excellent
line and load transient response with only a 10 µF ceramic
output capacitor.
The ADP7157 is available in four models that optimize power
dissipation and PSRR performance as a function of the input
and output voltage. See Table 9 and Table 10 for selection guides.
The typical output noise the ADP7157 regulator is 0.9 μV rms from
100 Hz to 100 kHz and 1.7 nV/√Hz for noise spectral density from
10 kHz to 1 MHz. The ADP7157 is available in 10-lead, 3 mm ×
3 mm LFCSP and 8-lead SOIC packages, making it not only a
very compact solution, but also providing excellent thermal
performance for applications requiring up to 1.2 A of output
current in a small, low profile footprint.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUIT
VIN = 3.8V
CIN
10µF
ON
OFF
CBYP
1µF
CREG
1µF
ADP7157
VIN VOUT
VOUT_SENSE
EN REF
BYP
REF_SENSE
VREG
GND
VOUT = 3.3V
COUT
10µF
CREF
1µF
R1
VOUT = 1.2V × (R1 + R2)/R2
R2
1kΩ < R2 < 200kΩ
Figure 1. Regulated 3.3 V Output from a 3.8 V Input
Table 1. Related Devices
Model
Input
Output
Voltage Current
ADP7159, 2.3 V to 2 A
ADP7158 5.5 V
ADP7156 2.3 V to 1.2 A
5.5 V
ADM7150, 4.5 V to 800 mA
ADM7151 16 V
ADM7154, 2.3 V to 600 mA
ADM7155 5.5 V
ADM7160 2.2 V to 200 mA
5.5 V
1k
100
Fixed/
Adjustable
Fixed
Fixed/
Adjustable
Fixed/
Adjustable
Fixed/
Adjustable
Fixed
Package
10-lead LFCSP/
8-lead SOIC
10-lead LFCSP/
8-lead SOIC
8-lead LFCSP/
8-lead SOIC
8-lead LFCSP/
8-lead SOIC
6-lead LFCSP/
5-lead TSOT
CBYP = 1µF
CBYP = 10µF
CBYP = 100µF
CBYP = 1000µF
10
1
0.1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 2. Noise Spectral Density at Different Values of CBYP, VOUT = 3.3 V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






ADP7157 Datasheet, Funktion
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
VIN to Ground
VREG to Ground
VOUT to Ground
VOUT_SENSE to Ground
VOUT to VOUT_SENSE
BYP to VOUT
EN to Ground
BYP to Ground
REF to Ground
REF_SENSE to Ground
Storage Temperature Range
Operational Junction Temperature
Range
Soldering Conditions
Rating
−0.3 V to +7 V
−0.3 V to VIN or +4 V
(whichever is less)
−0.3 V to VREG or +4 V
(whichever is less)
−0.3 V to VREG or +4 V
(whichever is less)
±0.3 V
±0.3 V
−0.3 V to +7 V
−0.3 V to VREG or +4 V
(whichever is less)
−0.3 V to VREG or +4 V
(whichever is less)
−0.3 V to +4 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP7157 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that TJ is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
need to be derated.
In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long as
the junction temperature is within specification limits. The
junction temperature (TJ) of the device is dependent on the
ambient temperature (TA), the power dissipation of the device
(PD), and the junction to ambient thermal resistance of the
package (θJA).
ADP7157
The maximum TJ is calculated from the TA and the PD using the
following formula:
TJ = TA + (PD × θJA)
The junction to ambient thermal resistance (θJA) of the package
is based on modeling and calculation using a 4-layer board. The
junction to ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The θJA value may vary, depending on
PCB material, layout, and environmental conditions. The specified
θJA values are based on a 4-layer, 4 in. × 3 in. circuit board. See
the JESD51-7 standard and the JESD51-9 standard for detailed
information on the board construction.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power
flowing through multiple thermal paths rather than a single
path as in thermal resistance, θJB. Therefore, ΨJB thermal paths
include convection from the top of the package as well as
radiation from the package, factors that make ΨJB more useful
in real-world applications. Use the board temperature (TB) and
power dissipation (PD) to calculate the maximum junction
temperature (TJ) by
TJ = TB + (PD × ΨJB)
See the JESD51-8 standard and the JESD51-12 standard for
more detailed information about ΨJB.
THERMAL RESISTANCE
θJA, θJC, and ΨJB are specified for the worst case conditions, that
is, a device soldered in a circuit board for surface-mount
packages.
Table 5. Thermal Resistance
Package Type
10-Lead LFCSP
θJA θJC ΨJB Unit
53.8 15.6 29.1 °C/W
8-Lead SOIC
50.4 42.3 30.1 °C/W
ESD CAUTION
Rev. A | Page 5 of 23

6 Page









ADP7157 pdf, datenblatt
Data Sheet
2.5
2.0
1.5 10Hz TO 100kHz
1.0 100Hz TO 100kHz
0.5
0
1.0 1.5 2.0 2.5 3.0
OUTPUT VOLTAGE (V)
Figure 29. RMS Output Noise vs. Output Voltage
3.5
1k
CCCCBBBBYYYYPPPP
=
=
=
=
1µF
10µF
100µF
1000µF
100
10
1
0.1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 30. Noise Spectral Density vs. Frequency at Various Values of CBYP
100k
10k
IIIILLLLOOOOAAAADDDD
=
=
=
=
10mA
100mA
600mA
1200mA
1k
100
10
1
0.1
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 31. Output Noise Spectral Density vs. Frequency
at Various Loads, 0.1 Hz to 1 MHz
ADP7157
1k
IIIILLLLOOOOAAAADDDD
=
=
=
=
10mA
100mA
600mA
1200mA
100
10
1
0.1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 32. Output Noise Spectral Density vs. Frequency
at Various Loads, 10 Hz to 10 MHz
SLEW RATE = 2.5A/µs
1 IOUT
2 VOUT
CH1 500mA BW CH2 5.00mV
BW M4.00µs A CH1
T 21.10%
700mA
Figure 33. Load Transient Response, ILOAD = 100 mA to 1.2 A,
VOUT = 3.3 V, VIN = 4.0 V, Channel 1 = IOUT, Channel 2 = VOUT
SLEW RATE = 1.5A/µs
IOUT
1
VOUT
2
CH1 500mA BW CH2 5.00mV
BW M4.00µs A CH1
T 22.60%
690mA
Figure 34. Load Transient Response, ILOAD = 100 mA to 1.2 A, VOUT = 3.3 V,
VIN = 4.0 V, COUT = 22 μF, Channel 1 = IOUT, Channel 2 = VOUT
Rev. A | Page 11 of 23

12 Page





SeitenGesamt 24 Seiten
PDF Download[ ADP7157 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
ADP7156RF Linear RegulatorAnalog Devices
Analog Devices
ADP7157RF Linear RegulatorAnalog Devices
Analog Devices
ADP7158RF Linear RegulatorAnalog Devices
Analog Devices
ADP7159RF Linear RegulatorAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche