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A8653 Schematic ( PDF Datasheet ) - Allegro

Teilenummer A8653
Beschreibung Synchronous USB Buck Regulator
Hersteller Allegro
Logo Allegro Logo 




Gesamt 30 Seiten
A8653 Datasheet, Funktion
A8652, A8653
Wide Input Voltage, Synchronous USB Buck Regulator
with Remote Load Regulation
FEATURES AND BENEFITS
• Automotive AEC-Q100 qualified
• Cable and wiring drop compensation
• Dynamic voltage correction with controller
• Integrated high-side and low-side switching MOSFETs
• Programmable load-side current limit
• Maximized duty cycle for low dropout operation
• Operating input voltage range: 4 V to 36 V
• UVLO STOP threshold is at 2.6 VTYP
• Withstands surge voltages up to 40 V
• Continuous loading: 2.6 A for A8653; 1 A for A8652
• Adjustable switching frequency (fSW): 100 kHz to
2.2 MHz
• Synchronization to external clock: 100 kHz to 2.2 MHz
• Frequency dithering for lower EMI signature
• External adjustable compensation network
• Stable with ceramic output capacitors
Continued on next page...
PACKAGES:
16-Pin eTSSOP (suffix LP) with exposed thermal pad
Not to scale
DESCRIPTION
The A8652/53 is a high output current synchronous buck
regulator that provides tight load regulation over a wiring
harness without the need for remote sense lines.This remote load
regulation is achieved with an integrated open-loop correction
scheme that, given a known wiring harness resistance, adjusts
the output voltage based on the measured load current and a
user-programmable gain, achieving ±2% accuracy at 500 mV
of correction. The Remote Load Regulation control includes a
115% regulated voltage clamp in conjunction with a dynamic
overvoltage protection, with OVP threshold changing with the
correction voltage. TheA8652/53 includes a user-configurable
load-side current limit to fold back the output voltage during an
output overcurrent condition. TheA8652/53 regulates nominal
input voltages from 4 to 36 V and remains operational when
VIN drops as low as 2.6 V. When the input voltage approaches
the output voltage, the duty cycle is maximized to maintain
the output voltage.
The A8652/53 features include externally set soft-start time,
external compensation network, an EN input to enable VOUT,
a SYNC/FSET input to synchronize or set the PWM switching
APPLICATIONS
• Automotive USB Power Ports
• Rear Seat Entertainment
• Navigation Systems
• Motorcycle Clusters
Continued on next page...
VIN
CIN
VIN
2 × 4.7 µF
GND
EN
RFSET
SYNC/FSET
CSS
22 nF
SS
RZ
CP
CZ
COMP
FB
A8652/3
BOOT
SW
GADJ
CBOOT
100 nF
RGADJ
LO
CO
RSEN
VOUT
ISEN+
ISEN-
IADJ
CF
(optional)
RF
(optional)
RIADJ
POK
RPU
10 kΩ
RFB1
24.9 kΩ
RFB2
4.75 kΩ
RWIRE/2
RWIRE/2
VLOAD
CLOAD
A8652/53-DS, Rev.2
Typical Application Diagram 1






A8653 Datasheet, Funktion
A8652,
A8653
Wide Input Voltage, Synchronous USB Buck Regulator
with Remote Load Regulation
ELECTRICAL CHARACTERISTICS: Valid at 4 V ≤ VIN ≤ 36 V; TA = 25ºC; • indicates specifications guaranteed
–40°C ≤ TA = TJ ≤ 150°C (unless noted otherwise).
Characteristics
Symbol
Test Conditions
Min. Typ. Max. Unit
INPUT VOLTAGE SPECIFICATIONS
Operating Input Voltage Range 2
UVLO Start Threshold
UVLO Stop Threshold
UVLO Hysteresis
INPUT CURRENTS
VIN
VUVLO(START)
VUVLO(STOP)
VUVLO(HYS)
VIN rising
VIN falling
4
– 36
3.4 3.7
2.6 2.9
800 –
V
V
V
mV
Input Quiescent Current 1
Input Sleep Supply Current 1
VOLTAGE REGULATION
IQ
IQSLEEP
VEN = 5 V, VFB = 1 V, no PWM switching
VIN = 12 V, VEN ≤ 0.4 V, –40°C < TA = TJ <
85°C
VIN = 12 V, VEN ≤ 0.4 V, TA = TJ = 125°C
3 6.5 mA
1 240 µA
40 900 µA
Feedback Voltage Accuracy 3
Feedback Voltage Accuracy with Cable
Compensation 3
Error Amp Clamp Voltage 3
Output Voltage Setting Range 3
Output Dropout Voltage 3
ERROR AMPLIFIER
VFB
VFB(ACC)
VFB(CLAMP)
VOUT
VO(PWM)
VFB = VCOMP, VGADJ = 0 V, –40°C < TA = TJ <
125°C
VFB = VCOMP, VGADJ = 0 V
VFB = VCOMP, VISEN+ – VISEN– = 25 mV,
VOUT = 5 V, RGADJ = 20 kΩ, RIADJ = 20 kΩ
VFB = VCOMP, VISEN+ – VISEN– = 55 mV,
VOUT =5 V, RGADJ = 7.5 kΩ, RIADJ = 20 kΩ
VIN = 5.7 V, IO = 2.6 A, fSW = 500 kHz
VIN = 7.3 V, IO = 2.6 A, fSW = 2 MHz
VIN = 5.5 V, IO = 1 A, fSW = 500 kHz
VIN = 6.8 V, IO = 1 A, fSW = 2 MHz
A8653
A8652
792
788
808
900
3.3
4.9
4.9
4.9
4.9
800 808
800 812
825 842
920 940
– 5.75
––
––
––
––
mV
mV
mV
mV
V
V
V
V
V
Feedback Input Bias Current 1
Open-Loop Voltage Gain
Transconductance
Output Current
INTERNAL MOSFET PARAMETERS
IFB
AVOL
gmEA
IEA
VCOMP = 1.2 V
400 mV < VFB
0 V < VFB < 400 mV
VCOMP = 1.2 V
–100
–8 nA
– 65 – dB
550 750 950
µA/V
275 375 475
– ±75 –
µA
High-Side MOSFET On-Resistance 3
SW Node Rising Slew Rate
SW Leakage 1
Low-Side MOSFET On-Resistance 3
RDSON(HS)
dV/dt
ISW(LEAK)
RDSON(LS)
TA = 25°C, IDS = 100 mA
12 V < VIN < 16 V
VEN ≤ 0.4 V, VSW = 5 V, VIN = 12 V, TJ = 25°C
TA = 25°C, IDS = 100 mA
– 80 –
– 0.75 – V/ns
–10 0
10 µA
– 55 –
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6

6 Page









A8653 pdf, datenblatt
A8652,
A8653
Wide Input Voltage, Synchronous USB Buck Regulator
with Remote Load Regulation
FUNCTIONAL DESCRIPTION
Overview
The A8652/53 is a synchronous PWM buck regulator that inte-
grates low RDS(on) high-side and low-side N-channel MOSFETs.
It is designed to remain operational when input voltage falls as
low as 2.6 V. The A8652/53 employs peak current mode control
to provide superior line and load regulation, pulse-by-pulse cur-
rent limit, fast transient response and simple compensation. The
A8652/53 incorporates a Cable Drop Compensation (Remote
Load Regulation) function in its current mode control architec-
ture to adjust the output voltage according to the load current,
offsetting the voltage drop introduced by the wiring harness. The
reference voltage in the feedback loop is adjusted relative to the
voltage across the sensing resistor at the load side. When the
load current increases, it causes the reference voltage at the error
amplifier to increase and the output voltage to follow. The gain of
the voltage correction is configurable using the GADJ and IADJ
pins. Such features provide flexibility in setting the amount of
output voltage correction and the load current limit.
The features of the A8652/53 include Remote Load Regula-
tion, an internal precision reference, an adjustable switching
frequency, a transconductance error amplifier, an enable input,
integrated top and bottom switching MOSFETs, adjustable soft-
start time, pre-bias startup, and a Power OK output. Protection
features of A8652/53 include VIN undervoltage lockout, pulse-by-
pulse overcurrent protection, BOOT overvoltage and undervolt-
age protection, hiccup mode short-circuit protection, dynamic
overvoltage protection, and thermal shutdown. In addition, the
A8652/53 provides open-circuit, adjacent pin short-circuit, and
pin-to-ground short-circuit protection.
Reference Voltage
The A8652/53 incorporates an internal precision reference that
allows output voltages as low as 0.8 V. The accuracy of the
internal reference is ±1% from –40°C to 125°C and ±1.5% across
from –40°C to 150°C when the Remote Load Regulation is dis-
abled. The output voltage of the regulator is programmed with a
resistor divider between VOUT and the FB pin of the A8652/53.
Oscillator/Switching Frequency and
Synchronization
The PWM switching frequency of the A8652/53 is adjustable
from 100 kHz to 2.2 MHz and has an accuracy of about ±10%
over the operating temperature range. Connecting a resistor
from the FSET/SYNC pin to GND, as shown in the Applications
Schematic, sets the switching frequency. An FSET resistor with
±1% tolerance is recommended. A graph of switching frequency
versus FSET resistor value is shown in the Component Selection
section of this datasheet. The A8652/53 will suspend operation if
the FSET pin is shorted to GND or left open.
FSET/SYNC pin also can be used as a synchronization input that
accepts an external clock to switch the A8652/53 from 100 kHz
to 2.2 MHz and scales the slope compensation according to the
synchronization frequency. When being used as a synchroniza-
tion input, the applied clock pulses must satisfy the pulse width,
duty cycle, and rise/fall time requirements shown in the Electrical
Characteristics shown in this datasheet.
Remote Load Regulation Control and
Transconductance Error Amplifier
The Remote Load Regulation control in the A8652/53 provides
improved load regulation at the remote load by increasing the
voltage reference of the error amplifier to correct for the voltage
drop introduced by wiring harness to the load. The amount of
voltage correction is user-programmable with external configu-
ration resistors, allowing the A8652/53 to be applied to wiring
harnesses that have up to 750 mV IR drops at full load. The
Remote Load Regulation controller has a variety of protection
features, including a load-side current limit, a maximum regula-
tion voltage, and protection in the event of open pin or shorted
pin conditions.
The Remote Load Regulation voltage correction and protection
features interface with the error amplifier, which is a four-termi-
nal input device with three positive inputs and one negative input,
as shown in Figure 1. The negative input is simply connected to
the FB pin and is used to sense the feedback voltage for regula-
tion. The error amplifier performs an “analog OR” selection
between its positive inputs, operating according to the positive
input with the lowest potential. The three positive inputs are used
for soft-start, steady-state regulation, and the 15% maximum
regulation voltage. The error amplifier regulates to the soft-start
pin voltage minus 400 mV during startup, the sum of A8652/53
internal reference (VREF) and the Remote Load Regulation
correction (REF_ADJ) during normal operation, or the 920 mV
maximum.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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