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DM9000B Schematic ( PDF Datasheet ) - DAVICOM

Teilenummer DM9000B
Beschreibung Ethernet Controller
Hersteller DAVICOM
Logo DAVICOM Logo 




Gesamt 30 Seiten
DM9000B Datasheet, Funktion
DM9000B
Ethernet Controller with General Processor Interface
DAVICOM Semiconductor, Inc.
DM9000B
Ethernet Controller
With General Processor Interface
DATA SHEET
Final
Version: DM9000B-13-DS-F01
February 1, 2008
Final
Version: DM9000B-DS-F01
February 1, 2008
1






DM9000B Datasheet, Funktion
DM9000B
Ethernet Controller with General Processor Interface
1. General Description
The DM9000B is a fully integrated and cost-effective
low pin count single chip Fast Ethernet controller with
a general processor interface, a 10/100M PHY and 4K
Dword SRAM. It is designed with low power and high
performance process interface that support 3.3V with
5V IO tolerance.
The DM9000B supports 8-bit and 16-bit data
interfaces to internal memory accesses for various
processors. The PHY of the DM9000B can interface to the
UTP3, 4, 5 in 10Base-T and UTP5 in 100Base-TX with
HP Auto-MDIX. It is fully compliant with the IEEE 802.3u
Spec. Its auto-negotiation function will automatically
configure the DM9000B to take the maximum advantage of
its abilities. The DM9000B also supports IEEE 802.3x full-
duplex flow control.
2. Block Diagram
LED
EEPROM
Interface
TX+/-
RX+/-
PHYceiver
100 Base-TX
transceiver
100 Base-TX
PCS
AUTO-MDIX
10 Base-T
Tx/Rx
MAC
MII
TX Machine
Control
&Status
Registers
RX Machine
Autonegotiation
MII Management
Control
& MII Register
Memory
Management
Internal
SRAM
Final
Version: DM9000B-13-DS-F01
February 1, 2008
6

6 Page









DM9000B pdf, datenblatt
3,4 RX+,RX-
5,47 RXGND
6 TXGND
7,8 TX+,TX-
5.6 Miscellaneous
Pin No.
Pin Name
41 TEST
40 PWRST#
DM9000B
Ethernet Controller with General Processor Interface
TP RX
I/O These two pins are the receive input in MDI mode or the transmit output
in MDIX mode.
P RX Ground
P TX Ground
TP TX
I/O These two pins are the transmit output in MDI mode or the receive input
in MDIX mode.
Type
I
I
Description
Operation Mode
Force to ground in normal application
Power on Reset
Active low signal to initiate the DM9000B
The DM9000B is ready after 5us when this pin deasserted
5.7 Power Pins
Pin No.
Pin Name
23,30,42
VDD
15,33,45
GND
Type
P
P
Digital VDD
3.3V power input
Digital GND
5.8 strap pins table
1: pull-high 1K~10K, 0: floating (default)
Pin No.
Pin Name Description
Polarity of INT
20
EECK
1: INT pin low active;
0: INT pin high active
21
EECS
DATA Bus Width
1: 8-bit
0: 16-bit
Polarity of CS# in 8-bit mode
22
WAKE
1: CS# pin active high
0: CS# pin active low
INT output type in 8-bit mode
25
GP6
1: Open-Drain
0: force mode
Description
Final
Version: DM9000B-13-DS-F01
February 1, 2008
12

12 Page





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