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DS3231 Schematic ( PDF Datasheet ) - Maxim Integrated

Teilenummer DS3231
Beschreibung Extremely Accurate I2C-Integrated RTC/TCXO/Crystal
Hersteller Maxim Integrated
Logo Maxim Integrated Logo 




Gesamt 20 Seiten
DS3231 Datasheet, Funktion
DS3231
Extremely Accurate I2C-Integrated
RTC/TCXO/Crystal
General Description
The DS3231 is a low-cost, extremely accurate I2C
real-time clock (RTC) with an integrated temperature-
compensated crystal oscillator (TCXO) and crystal.
The device incorporates a battery input, and maintains
accurate timekeeping when main power to the device
is interrupted. The integration of the crystal resonator
enhances the long-term accuracy of the device as well
as reduces the piece-part count in a manufacturing line.
The DS3231 is available in commercial and industrial
temperature ranges, and is offered in a 16-pin, 300-mil
SO package.
The RTC maintains seconds, minutes, hours, day, date,
month, and year information. The date at the end of the
month is automatically adjusted for months with fewer
than 31 days, including corrections for leap year. The
clock operates in either the 24-hour or 12-hour format
with an AM/PM indicator. Two programmable time-of-day
alarms and a programmable square-wave output are
provided. Address and data are transferred serially
through an I2C bidirectional bus.
A precision temperature-compensated voltage reference
and comparator circuit monitors the status of VCC to
detect power failures, to provide a reset output, and to
automatically switch to the backup supply when necessary.
Additionally, the RST pin is monitored as a pushbutton
input for generating a μP reset.
Typical Operating Circuit
VCC
VCC RPU = tR/CB
RPU RPU
SCL
SDA
P
RST
PUSHBUTTON
RESET
SCL
SDA
RST
N.C.
N.C.
N.C.
N.C.
Benefits and Features
● Highly Accurate RTC Completely Manages All
Timekeeping Functions
• Real-Time Clock Counts Seconds, Minutes, Hours,
Date of the Month, Month, Day of the Week, and
Year, with Leap-Year Compensation Valid Up to 2100
• Accuracy ±2ppm from 0°C to +40°C
• Accuracy ±3.5ppm from -40°C to +85°C
• Digital Temp Sensor Output: ±3°C Accuracy
• Register for Aging Trim
RST Output/Pushbutton Reset Debounce Input
• Two Time-of-Day Alarms
• Programmable Square-Wave Output Signal
● Simple Serial Interface Connects to Most
Microcontrollers
• Fast (400kHz) I2C Interface
● Battery-Backup Input for Continuous Timekeeping
• Low Power Operation Extends Battery-Backup
Run Time
• 3.3V Operation
● Operating Temperature Ranges: Commercial
(0°C to +70°C) and Industrial (-40°C to +85°C)
● Underwriters Laboratories® (UL) Recognized
Applications
● Servers
● Telematics
● Utility Power Meters
● GPS
Ordering Information and Pin Configuration appear at end of data
sheet.
VCC
VCC
INT/SQW
32kHz
DS3231
GND
VBAT
N.C.
N.C.
N.C.
N.C.
Underwriters Laboratories is a registered certification mark of
Underwriters Laboratories Inc.
19-5170; Rev 10; 3/15






DS3231 Datasheet, Funktion
DS3231
Data Transfer on I2C Serial Bus
Extremely Accurate I2C-Integrated
RTC/TCXO/Crystal
SDA
tBUF
SCL
STOP
START
tLOW
tHD:STA
tR tF
tHD:STA
tHD:DAT
tHIGH
tSU:DAT
tSU:STA
REPEATED
START
tSP
tSU:STO
WARNING: Negative undershoots below -0.3V while the part is in battery-backed mode may cause loss of data.
Note 2: Limits at -40°C are guaranteed by design and not production tested.
Note 3: All voltages are referenced to ground.
Note 4: ICCA—SCL clocking at max frequency = 400kHz.
Note 5: Current is the averaged input current, which includes the temperature conversion current.
Note 6: The RST pin has an internal 50kΩ (nominal) pullup resistor to VCC.
Note 7: After this period, the first clock pulse is generated.
Note 8: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH(MIN) of the SCL sig-
nal) to bridge the undefined region of the falling edge of SCL.
Note 9: The maximum tHD:DAT needs only to be met if the device does not stretch the low period (tLOW) of the SCL signal.
Note 10: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT ≥ 250ns must then be met. This
is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the
low period of the SCL signal, it must output the next data bit to the SDA line tR(MAX) + tSU:DAT = 1000 + 250 = 1250ns
before the SCL line is released.
Note 11: CB—total capacitance of one bus line in pF.
Note 12: The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range
of 0.0V ≤ VCC ≤ VCC(MAX) and 2.3V ≤ VBAT ≤ 3.4V.
Note 13: This delay applies only if the oscillator is enabled and running. If the EOSC bit is a 1, tREC is bypassed and RST immedi-
ately goes high. The state of RST does not affect the I2C interface, RTC, or TCXO.
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DS3231 pdf, datenblatt
DS3231
Extremely Accurate I2C-Integrated
RTC/TCXO/Crystal
decimal (BCD) format. The DS3231 can be run in either
12-hour or 24-hour mode. Bit 6 of the hours register is
defined as the 12- or 24-hour mode select bit. When high,
the 12-hour mode is selected. In the 12-hour mode, bit 5
is the AM/PM bit with logic-high being PM. In the 24-hour
mode, bit 5 is the 20-hour bit (20–23 hours). The century
bit (bit 7 of the month register) is toggled when the years
register overflows from 99 to 00.
The day-of-week register increments at midnight. Values
that correspond to the day of week are user-defined but
must be sequential (i.e., if 1 equals Sunday, then 2 equals
Monday, and so on). Illogical time and date entries result
in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when the
internal registers update. When reading the time and date
registers, the user buffers are synchronized to the internal
registers on any START and when the register pointer
rolls over to zero. The time information is read from these
secondary registers, while the clock continues to run. This
eliminates the need to reread the registers in case the
main registers update during a read.
The countdown chain is reset whenever the seconds
register is written. Write transfers occur on the acknowl-
edge from the DS3231. Once the countdown chain is
reset, to avoid rollover issues the remaining time and
date registers must be written within 1 second. The 1Hz
square-wave output, if enabled, transitions high 500ms
after the seconds data transfer, provided the oscillator is
already running.
Alarms
The DS3231 contains two time-of-day/date alarms.
Alarm 1 can be set by writing to registers 07h to 0Ah.
Alarm 2 can be set by writing to registers 0Bh to 0Dh.
The alarms can be programmed (by the alarm enable
and INTCN bits of the control register) to activate the
INT/SQW output on an alarm match condition. Bit 7 of
each of the time-of-day/date alarm registers are mask
bits (Table 2). When all the mask bits for each alarm
are logic 0, an alarm only occurs when the values in
the timekeeping registers match the corresponding val-
ues stored in the time-of-day/date alarm registers. The
alarms can also be programmed to repeat every second,
minute, hour, day, or date. Table 2 shows the possible
settings. Configurations not listed in the table will result
in illogical operation.
The DY/DT bits (bit 6 of the alarm day/date registers)
control whether the alarm value stored in bits 0 to 5 of
that register reflects the day of the week or the date of
the month. If DY/DT is written to logic 0, the alarm will be
the result of a match with date of the month. If DY/DT is
written to logic 1, the alarm will be the result of a match
with day of the week.
When the RTC register values match alarm register set-
tings, the corresponding Alarm Flag ‘A1F’ or ‘A2F’ bit is
set to logic 1. If the corresponding Alarm Interrupt Enable
‘A1IE’ or ‘A2IE’ is also set to logic 1 and the INTCN bit
is set to logic 1, the alarm condition will activate the
INT/SQW signal. The match is tested on the once-per-
second update of the time and date registers.
Table 2. Alarm Mask Bits
DY/DT
X
X
X
X
0
1
ALARM 1 REGISTER MASK BITS (BIT 7)
A1M4
A1M3
A1M2
A1M1
1111
1110
1100
1000
0000
0000
ALARM RATE
Alarm once per second
Alarm when seconds match
Alarm when minutes and seconds match
Alarm when hours, minutes, and seconds match
Alarm when date, hours, minutes, and seconds match
Alarm when day, hours, minutes, and seconds match
DY/DT
X
X
X
0
1
ALARM 2 REGISTER MASK BITS (BIT 7)
A2M4
A2M3
A2M2
111
110
100
000
000
ALARM RATE
Alarm once per minute (00 seconds of every minute)
Alarm when minutes match
Alarm when hours and minutes match
Alarm when date, hours, and minutes match
Alarm when day, hours, and minutes match
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