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ADUM5412 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADUM5412
Beschreibung Quad-Channel Isolators
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 29 Seiten
ADUM5412 Datasheet, Funktion
Data Sheet
Quad-Channel Isolators with
Integrated DC-to-DC Converters
ADuM5410/ADuM5411/ADuM5412
FEATURES
isoPower integrated, isolated dc-to-dc converter
Up to 150 mW output power
Quad dc to 150 Mbps signal isolation channels
24-lead SSOP package with 5.3 mm minimum creepage
High temperature operation: 105°C
High common-mode transient immunity: 100 kV/μs
Safety and regulatory approvals
UL recognition (pending)
2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A (pending)
VDE certificate of conformity (pending)
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 565 V peak
APPLICATIONS
RS-232 transceivers
Power supply startup bias and gate drives
Isolated sensor interfaces
Industrial PLCs
GENERAL DESCRIPTION
The ADuM5410/ADuM5411/ADuM54121 are quad-channel
digital isolators with isoPower®, integrated, isolated dc-to-dc
converters. Based on the Analog Devices, Inc., iCoupler®
technology, the dc-to-dc converters provide regulated, isolated
power that is adjustable between 3.15 V and 5.25 V. Popular
voltage combinations and the associated power levels are shown
in Table 1.
The ADuM5410/ADuM5411/ADuM5412 eliminate the need
for a separate, isolated dc-to-dc converter in low power, isolated
designs. The iCoupler chip scale transformer technology is used for
isolated logic signals and for the magnetic components of the
dc-to-dc converters. The result is a small form factor, total
isolation solution.
The ADuM5410/ADuM5411/ADuM5412 isolators provide four
independent isolation channels in a variety of channel configura-
tions and data rates (see the Ordering Guide for more
information).
FUNCTIONAL BLOCK DIAGRAM
VDD1 1
GND1 2
I/O1A 3
I/O1B 4
I/O1C 5
I/O1D 6
VE1 7
NIC 8
GND1 9
PDIS 10
VDDP 11
GND1 12
4-CHANNEL iCoupler CORE
ADuM5410/ADuM5411/
ADuM5412
PCS
OSC
RECT REG
24 VDD2
23 GNDISO
22 I/O2A
21 I/O2B
20 I/O2C
19 I/O2D
18 VE2
17 NIC
16 GNDISO
15 VSEL
14 VISO
13 GNDISO
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 1.
Table 1. Power Levels
Input Voltage (V) Output Voltage (V)
55
5 3.3
3.3 3.3
Output Power (mW)
150
100
66
Table 2. Data Input/Output Port Assignments
Ch. Pin No. ADuM5410 ADuM5411
I/O1A 3
VIA
VIA
I/O1B 4
VIB
VIB
I/O1C 5
VIC
VIC
I/O1D 6
VID
VOD
I/O2A 22
VOA
VOA
I/O2B 21
VOB
VOB
I/O2C 20
VOC
VOC
I/O2D 19
VOD
VID
ADuM5412
VIA
VIB
VOC
VOD
VOA
VOB
VIC
VID
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Rev. 0
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
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ADUM5412 Datasheet, Funktion
ADuM5410/ADuM5411/ADuM5412
Data Sheet
Table 10. Input and Output Characteristics
Parameter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
Logic Low
Symbol Min
VIH 0.7 × VISO or 0.7 ×
VDD1
VIL
VOH VDD1 − 0.2 or VDD2
0.2
VDD1 − 0.5 or
VDD2 − 0.5
VOL
Undervoltage Lockout
Positive Going Threshold
Negative Going Threshold
Hysteresis
Input Currents per Channel
Quiescent Supply Current
ADuM5410
ADuM5411
ADuM5412
Dynamic Supply Current
Input
UVLO
VUV+
VUV−
VUVH
II
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDDI (D)
Output
IDDO (D)
−10
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient
Immunity1
tR/tF
|CMH|
|CML|
75
75
Typ Max
0.3 × VISO or 0.3 ×
VDD1
VDD1 or VDD2
VDD1 − 0.2 or
VDD2 − 0.2
0.0
0.0
0.1
0.4
1.6
1.5
0.1
+0.01
+10
1.2 2.12
2.0 2.68
12.0 19.6
2.0 2.8
1.5 2.36
1.8 2.52
9.8 16.7
5.7 9.7
1.6 2.4
1.6 2.4
7.2 11.2
8.4 11.2
0.01
0.01
2.5
100
100
Test Conditions/
Unit Comments
V
V
V IOx = −20 µA, VIx = VIxH
V IOx = −4 mA, VIx = VIxH
V IOx = 20 µA, VIx = VIxL
V IOx = 4 mA, VIx = VIxL
VDD1, VDD2, and VDDP supply
V
V
V
µA 0 V ≤ VIx ≤ VDDx
mA VIx = Logic 0
mA VIx = Logic 0
mA VIx = Logic 1
mA VIx = Logic 1
mA VIx = Logic 0
mA VIx = Logic 0
mA VIx = Logic 1
mA VIx = Logic 1
mA VIx = Logic 0
mA VIx = Logic 0
mA VIx = Logic 1
mA VIx = Logic 1
mA/Mbps
mA/Mbps
Inputs switching, 50% duty
cycle
Inputs switching, 50% duty
cycle
ns
kV/µs
kV/µs
10% to 90%
VIx = VDD1 or VISO, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
1 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum common-
mode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both the rising and falling common-mode
voltage edges.
Rev. 0 | Page 6 of 29

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ADUM5412 pdf, datenblatt
ADuM5410/ADuM5411/ADuM5412
Data Sheet
Table 20. Input and Output Characteristics
Parameter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltages
Logic High
Logic Low
Symbol Min
VIH 0.7 × VDDx
VIL
VOH VDDx − 0.1
VDDx − 0.4
VOL
Undervoltage Lockout
Positive Going Threshold
Negative Going Threshold
Hysteresis
Input Currents per Channel
Quiescent Supply Current
ADuM5410
ADuM5411
ADuM5412
Dynamic Supply Current
Input
UVLO
VUV+
VUV−
VUVH
II
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDDI (D)
Output
IDDO (D)
−10
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient
Immunity1
tR/tF
|CMH|
|CML|
75
75
Typ Max
VDDx
VDDx − 0.2
0.0
0.2
1.6
1.5
0.1
+0.01
0.3 × VDDx
0.1
0.4
+10
1.2 1.92
2.0 2.64
12.0 19.6
2.0 2.76
1.4 2.28
1.73 2.45
9.6 16.5
5.6 9.6
1.6 2.28
1.6 2.28
7.2 11.2
8.4 11.2
0.01
0.01
2.5
100
100
Test Conditions/
Unit Comments
V
V
V IOx = −20 µA, VIx = VIxH
V IOx = −4 mA, VIx = VIxH
V IOx = 20 µA, VIx = VIxL
V IOx = 4 mA, VIx = VIxL
VDD1, VDD2, and VDDP supply
V
V
V
µA 0 V ≤ VIx ≤ VDDx
mA VIx = Logic 0
mA VIx = Logic 0
mA VIx = Logic 1
mA VIx = Logic 1
mA VIx = Logic 0
mA VIx = Logic 0
mA VIx = Logic 1
mA VIx = Logic 1
mA VIx = Logic 0
mA VIx = Logic 0
mA VIx = Logic 1
mA VIx = Logic 1
mA/Mbps
mA/Mbps
Inputs switching, 50% duty
cycle
Inputs switching, 50% duty
cycle
ns
kV/µs
kV/µs
10% to 90%
VIx = VDD1 or VISO, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, VCM = 1000 V,
transient magnitude = 800 V
1 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum common-
mode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both the rising and falling common-mode
voltage edges.
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