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PDF ADPD103 Data sheet ( Hoja de datos )

Número de pieza ADPD103
Descripción Photometric Front End
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
FEATURES
Multifunction photometric front end
Fully integrated AFE, ADC, LED drivers, and timing core
Usable in a broad range of optical measurement
applications, including photoplethysmography
Enables best-in-class ambient light rejection capability
without the need for photodiode optical filters
Three 8 mA to 250 mA LED drivers
Separate data registers for each LED/photodiode
combination
1 to 8 optical inputs
Flexible, multiple, short LED pulses per optical sample
20-bit burst accumulator enabling 20 bits per sample period
On-board sample to sample accumulator, enabling up to
27 bits per data read
Low power operation
I2C interface and 1.8 V analog/digital core
Flexible sampling frequency ranging from 0.122 Hz to
3.820 kHz
FIFO data operation
APPLICATIONS
Body worn health and fitness monitors, for example, heart
rate monitoring
Clinical measurements, for example, SpO2
Industrial monitoring
Background light measurements
Photometric Front End
ADPD103
GENERAL DESCRIPTION
The ADPD103 is a highly efficient photometric front end with
an integrated 14-bit analog-to-digital converter (ADC) and a
20-bit burst accumulator that works in concert with flexible
light emitting diode (LED) drivers. It is designed to stimulate an
LED and measure the corresponding optical return signal. The
data output and functional configuration occur over a 1.8 V I2C
interface. The control circuitry includes flexible LED signaling and
synchronous detection.
The analog front end (AFE) features best-in-class rejection of signal
offset and corruption due to modulated interference commonly
caused by ambient light.
Couple the ADPD103 with a low capacitance photodiode of
<100 pF for optimal performance. The ADPD103 can be used with
any LED.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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ADPD103 pdf
ADPD103
Data Sheet
SPECIFICATIONS
TEMPERATURE AND POWER SPECIFICATIONS
Table 1. Operating Conditions
Parameter
TEMPERATURE RANGE
Operating Range
Storage Range
POWER SUPPLY VOLTAGES
VDD
Test Conditions/Comments
Applied at the AVDD and DVDD pins
Min Typ Max
−40 +85
−65 +150
1.7 1.8 1.9
Unit
°C
°C
V
AVDD = DVDD = 1.8 V, ambient temperature, unless otherwise noted.
Table 2. Current Consumption1, 2
Parameter
Symbol
POWER SUPPLY (VDD) CURRENT
VDD Supply Current
1 Pulse
10 Pulses
Peak VDD Supply Current
(1.8 V)
4-Channel Operation
1-Channel Operation
Standby Mode Current
VLEDA AND VLEDB SUPPLY
CURRENT
Average Supply Current
VLEDA or VLEDB
1 Pulse
IVDD_PEAK
IVDD_STANDBY
10 Pulses
Test Conditions/Comments
LED_OFFSET = 25 µs; LED_PERIOD =19 µs; LED peak current =
25 mA, 4 channels active
100 Hz data rate; Time Slot A only
100 Hz data rate; Time Slot B only
100 Hz data rate; both Time Slot A and Time Slot B
100 Hz data rate; Time Slot A only
100 Hz data rate; Time Slot B only
100 Hz data rate; both Time Slot A and Time Slot B
Peak LED current = 100 mA; LED_PULSE width = 3 µs
50 Hz data rate
100 Hz data rate
200 Hz data rate
50 Hz data rate
100 Hz data rate
200 Hz data rate
1 LEDA or LEDB is one of LED1, LED2, or LED3. VLEDA or VLEDB is one of VLED1, VLED2, or VLED3.
2 VDD is the voltage applied at the AVDD and DVDD pins.
Min Typ Max Unit
106 µA
94 µA
151 µA
258 µA
246 µA
455 µA
9.3 mA
2.3 mA
3.5 µA
15 µA
30 µA
60 µA
150 µA
300 µA
600 µA
Rev. B | Page 4 of 52

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ADPD103 arduino
ADPD103
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Data Sheet
INT 1
PDSO 2
DVDD 3
AGND 4
VREF 5
AVDD 6
PD1 7
ADPD103
TOP VIEW
(Not to Scale)
21 NIC
20 NIC
19 NIC
18 NIC
17 NIC
16 NIC
15 PD8
NOTES
1. NIC = NONBONDED PAD, CAN BE GROUNDED.
2. EXPOSED PAD (DIGITAL GROUND). CONNECT THE
EXPOSED PAD TO GROUND.
Figure 4. 28-Lead LFCSP Pin Configuration
Table 10. 28-Lead LFCSP Pin Function Descriptions
Pin No. Mnemonic Type1 Description
1 INT
DO Interrupt Output.
2 PDSO DO Power-Down Status Output.
3
DVDD
S 1.8 V Digital Supply.
4
AGND
S Analog Ground.
5 VREF
REF Internally Generated ADC Voltage Reference. Buffer this pin with a 1 µF capacitor to AGND.
6 AVDD S 1.8 V Analog Supply.
7 PD1
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
8 PD2
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
9 PD3
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
10 PD4
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
11 PDC
AO Photodiode Common Cathode Bias.
12 PD5
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
13 PD6
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
14 PD7
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
15 PD8
AI Photodiode Current Input (Anode). If not in use, leave this pin floating.
16 to 22 NIC
R Not Internally Connected (Nonbonded Pad). This pin can be grounded.
23 LEDX1 AO LED Driver 1 Current Sink. If not in use, leave this pin floating.
24 LEDX3 AO LED Driver 3 Current Sink. If not in use, leave this pin floating.
25 LEDX2 AO LED Driver 2 Current Sink. If not in use, leave this pin floating.
26 LGND
S LED Driver Ground.
27 SCL
DI I2C Clock Input.
28 SDA
DIO I2C Data Input/Output.
EPAD (DGND) S
Exposed Pad (Digital Ground). Connect the exposed pad to ground.
1 DO means digital output, S means supply, REF means voltage reference, AI means analog input, AO means analog output, R means reserved, DI means digital input,
and DIO means digital input/output.
Rev. B | Page 10 of 52

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