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ADT7462 Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer ADT7462
Beschreibung Voltage Monitor and System Fan Controller
Hersteller ON Semiconductor
Logo ON Semiconductor Logo 




Gesamt 30 Seiten
ADT7462 Datasheet, Funktion
ADT7462
Flexible Temperature,
Voltage Monitor, and
System Fan Controller
The ADT7462 is a flexible systems monitor IC, suitable for use in a
wide variety of applications. It can monitor temperature in up to three
remote locations, as well as its ambient temperature.
There are up to four PWM outputs. These can be used to control the
speed of a cooling fan by varying the % duty cycle of the PWM drive
signal applied to the fan. The ADT7462 supports high frequency
PWM for 4-wire fans and low frequency PWM for 2-wire and 3-wire
fans. Up to eight TACH inputs can be used to measure the speed of
3-wire and 4-wire fans. There are up to 13 voltage monitoring inputs,
ranging from 12 V to 0.9 V.
The ADT7462 is fully compatible with SMBus 1.1 and SMBus 1.0.
The ADT7462 also includes a THERM I/O and a RESET I/O.
The ADT7462 is available in a 32-lead LFCSP_VQ. Many of the
pins are multi-functional. Five easy configuration options can be set
up using the easy configuration register. Users choose the
configuration closest to their requirements; individual pins can be
reconfigured after the easy configuration option has been chosen.
Features
One Local and Up to Three Remote Temperature Channels Series
Resistance Cancellation On Remote Channels
Thermal Protection Using THERM Pins
Up to Four PWM Fan Drive Outputs Supports Both High and
Low Frequency PWM Drives
Up to Eight TACH Inputs Measures the Speed of 3-wire and
4-wire Fans
Automatic Fan Speed Control Loop Includes Dynamic TMIN Control
Monitors Up to 13 V Inputs
Monitors Up to 7 VID Inputs; Includes On-The-Fly (OTF)
VID Support
Bidirectional Reset
Chassis Intrusion Detect
SMBus 1.1 and SMBus 1.0 Compatible
3.3 V and 5.0 V Operation
Extended Operating Range from −40°C to +125°C
Space-saving 32-lead Chip Scale Package
This is a Pb-Free Device*
Applications
Servers and Personal Computers
Telecommunications Equipment
Test Equipment and Measurement Instruments
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
www.onsemi.com
LFCSP−32
CASE 932
PIN ASSIGNMENT
VID0/GPIO1/TACH1
VID1/GPIO2/TACH2
VID2/GPIO3/TACH3
VID3/GPIO4/TACH4
V CC
GND
TACH5/+12V1
TACH6/+12V2
1
2
3
4
5
6
7
8
PIN 1
INDICATOR
ADT7462
V CCP2/
24 +1.5V/+1.8V/+2.5V
23
V CCP1/
+1.5V/+1.8V/+2.5V
22 TACH8/+12V3
21 TACH7/+5V
20 D3–/SCSI_TERM2
19 D3+/+1.25V/+0.9V
18 D2–
17 D2+
MARKING DIAGRAM
ADT
7462ACPZ
#YYWW
AL
CCCCC
ADT7462ACPZ = Specific Device Code
# = Pb-Free Package
YYWW
= Date Code
AL = Assembly Lot
CC = Country Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 81 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. 5
1
Publication Order Number:
ADT7462/D






ADT7462 Datasheet, Funktion
ADT7462
Table 4. ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted.) (Note 1)
Parameter
Test Conditions/Comments
Min Typ Max Unit
OPEN-DRAIN SERIAL BUS OUTPUT (SDA)
Output Low Voltage, VOL
IOUT = −3 mA, VCC = +3.3 V
High Level Output Leakage Current, IOH VOUT = VCC
SERIAL BUS DIGITAL INPUTS (SDA AND SCL)
− − 0.4 V
− 0.1 ±1.0 mA
Input High Voltage, VIH
Input Low Voltage, VIL
Hysteresis
2.1 − − V
− − 0.8 V
− 500 − mV
DIGITAL INPUT LOGIC LEVELS (VID0 to VID6) AND THERM, TACH, GPIO, VR_HOT, SCSI_TERM)
Input High Voltage, VIH
Input Low Voltage, VIL
Input High Voltage, VIH (VID0 to VID6)
Input High Voltage, VIH (THERM)
Input Low Voltage, VIL
Hysteresis
DIGITAL INPUT CURRENTS
Input High Current, IIH
Input Low Current, IIL
Input Capacitance (Note 3)
SERIAL BUS TIMING (Note 3)
Bit 3 and Bit 4 of Configuration Register 3 = 0
1.7
− −V
Bit 3 and Bit 4 of Configuration Register 3 = 0
− 0.8 V
Bit 3 of Configuration Register 3 = 1
0.65 − − V
Bit 4 of Configuration Register 3 = 1
Bit 3 and Bit 4 of Configuration Register 3 = 1
2/3 VCCP1
−V
0.4 V
− 500 − mV
VIN = VCC
VIN = 0
−1.0 − − mA
+1.0
mA
− 5.0 − pF
Clock Frequency
See Figure 2
− − 400 kHz
Glitch Immunity, tSW
Bus Free Time
See Figure 2
See Figure 2
− 50 − ns
1.3 − − ms
Start Setup Time, tSU;STA
Start Hold Time, tHD;STA
SCL Low Time, tLOW
SCL High Time, tHIGH
SCL, SDA Rise Time, tR
SCL, SDA Fall Time, tF
Data Setup Time, tSU;DAT
Detect Clock Low Timeout
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
Can Be Optionally Enabled
0.6 − − ms
0.6 − − ms
1.3 − − ms
0.6 − − ms
1000
ns
− − 300 ns
100 − − ns
− 25 − ms
1. All voltages are measured with respect to GND, unless otherwise specified. Typical values are at TA = 25°C and represent the most likely
parametric norm. Logic inputs accept input high voltages up to 5.0 V, even when the device is operating at supply voltages below 5.0 V. Timing
specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.0 V for a rising edge.
2. Unused digital inputs connected to GND.
3. Guaranteed by design, not production tested.
4. Note that this specification does not apply if Pin 26 (VBATT, +1.2V) is being measured in single-channel mode. See Figure 16 in the Typical
Performance Characteristics section for VBATT accuracy.
5. For Pin 23 and Pin 24 configured as +1.8V or +2.5V only, restricted conditions of VCC 3.3 V and +25°C TA +125°C apply.
SCL
SDA
tBUF
PS
t LOW
tR
tHD; STA
tHD; DAT
tF
tHIGH
tSU; DAT
t HD; STA
tSU; STA
S
Figure 2. Serial Bus Timing Diagram
tSU; STO
P
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ADT7462 pdf, datenblatt
ADT7462
Configuration Option 3
Configuration Option 3 is used to monitor all the voltages
in the system for Processor 1 and Processor 2. Additional
pins can be configured for fan control, VIDs, or GPIOs, as
required. Features of Configuration Option 3 include the
following:
Up to 13 Different Voltages Monitored
Three +12V
+5V
+3.3V
+2.5V
+1.8V
Two +1.5V
Two +1.2V (VCCP1, VCCP2)
0.9V
VBATT
One Local and One Remote Temperature Channels
Up to Three PWM Drives and Up to Four TACH Inputs
RESET I/O
Figure 21 shows the pin configuration when Configuration
Option 3 is chosen.
TACH1
TACH2
TACH3
TACH4
VCC
GND
+12V1
+12V2
1
2
3
4
5
6
7
8
PIN 1
INDICATOR
ADT7462
TOP VIEW
(Not to Scale)
24 VCCP2
23 VCCP1
22 +12V3
21 +5V
20 SCSI_TERM2
19 +0.9V
18 D2–
17 D2+
Table 8. CONFIGURATION OPTION 3
Pin Function Configuration Register
Bit Value
1TACH1 Pin Configuration Reg 1 Bit 4 = 1
2TACH2 Pin Configuration Reg 1 Bit 3 = 1
3TACH3 Pin Configuration Reg 1 Bit 2 = 1
4TACH4 Pin Configuration Reg 1 Bit 1 = 1
7
+12V1
Pin Configuration Reg 1 Bit 0 = 0
8
+12V2
Pin Configuration Reg 2 Bit 7 = 0
13 +3.3V Pin Configuration Reg 2 Bit 6 = 0
15 +1.8V Pin Configuration Reg 1 Bit 6 = 0
16 SCSI_ Pin Configuration Reg 1 Bit 6 = 0
TERM1
19 +0.9V Pin Configuration Reg 1 Bit 5 = 0
20 SCSI_ Pin Configuration Reg 1 Bit 5 = 0
TERM2
21 +5V Pin Configuration Reg 2 Bit 3 = 0
22 +12V3 Pin Configuration Reg 2 Bit 2 = 0
23 VCCP1 Pin Configuration Reg 2 Bits [1:0] = 00
24 VCCP2 Pin Configuration Reg 3 Bits [7:6] = 00
25 +1.2V Pin Configuration Reg 3 Bits [5:4] = 01
26 VBATT Pin Configuration Reg 3 Bits [3:2] = 00
27 CI Pin Configuration Reg 3 Bit 1 = 1
28+1.5V/ Pin Configuration Reg 4 Bits [7:6] = 01
GPIO7
29 +1.5V/ Pin Configuration Reg 4 Bits [5:4] = 01
GPIO8
31PWM1 Pin Configuration Reg 4 Bit 3 = 1
32PWM2 Pin Configuration Reg 4 Bit 2 = 1
†If VIDs are selected, these pins are configured as VIDs. To enable
VIDs, set Bit 7 of Pin Configuration Register 1 (0x10) = 1.
Figure 21. Configuration Option 3
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