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PDF AD7709 Data sheet ( Hoja de datos )
| Número de pieza | AD7709 | |
| Descripción | 16-Bit ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
FEATURES
16-Bit ⌺-⌬ ADC
Programmable Gain Front End
Simultaneous 50 Hz and 60 Hz Rejection at 20 Hz
Update Rate
VREF Select™ Allows Absolute and Ratiometric
Measurement Capability
ISOURCE Select™
16-Bit No Missing Codes
13-Bit p-p Resolution @ 20 Hz, 20 mV Range
16-Bit p-p Resolution @ 20 Hz, 2.56 V Range
INTERFACE
3-Wire Serial
SPI®, QSPI™, MICROWIRE™, and DSP Compatible
Schmitt Trigger on SCLK
POWER
Specified for Single 3 V and 5 V Operation
Normal: 1.25 mA Typ @ 3 V
Power-Down: 7 A (32.768 kHz Crystal Running)
ON-CHIP FUNCTIONS
Rail-to-Rail Input Buffer and PGA
Selectable Reference Inputs
3 Switchable, Ratioed Current Sources for
VBE Measurements
4-Bit Digital I/O Port
Low-Side Power Switches
16-Bit ⌺-⌬ ADC with
Switchable Current Sources
AD7709
APPLICATIONS
Sensor Measurement
Temperature Measurement
Pressure Measurements
Weigh Scales
Portable Instrumentation
4–20 mA Loops
GENERAL DESCRIPTION
The AD7709 is a complete analog front end for low frequency
measurement applications. It contains a 16-bit ⌺-⌬ ADC, selectable
reference inputs, three switchable matched excitation current
sources, low-side power switches, and a digital I/O port. The
16-bit channel with PGA accepts fully differential, unipolar,
and bipolar input signal ranges from 1.024 ϫ REFIN/128 to
1.024 ϫ REFIN. It can be configured as two fully differential
input channels or four pseudo-differential input channels. Signals
can be converted directly from a transducer without the need for
signal conditioning.
The device operates from a 32.768 kHz crystal with an on-chip
PLL generating the required internal operating frequency. The
output data rate from the part is software programmable. The
p-p resolution from the part varies with the programmed gain
and output data rate.
The part operates from a single 3 V or 5 V supply. When
operating from 3 V supplies, the power dissipation for the part
is 3.75 mW. The AD7709 is housed in a 24-lead TSSOP package.
IOUT1
IOUT2
AIN1
AIN2
AIN3/P3
AIN4/P4
AINCOM
VDD
IEXC1
IEXC2
8I 8I
FUNCTIONAL BLOCK DIAGRAM
REFIN1(+) REFIN2(+) REFIN1(–) REFIN2(–)
IEXC3
I
XTAL1 XTAL2
OSCILLATOR
AND
PLL
MUX
I = 25A
BUF
PGA
16-BIT ⌺-⌬ ADC
SERIAL
INTERFACE
AND
CONTROL
LOGIC
VDD
I/O PORT
DOUT
DIN
SCLK
CS
RDY
RESET
AD7709
VDD
GND
PWRGND
P1/SW1 P2/SW2
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
AD7709
SPECIFICATIONS (continued)
Parameter
AD7709A, AD7709B
EXCITATION CURRENT SOURCES
(IEXC1, IEXC2, and IEXC3)
Output Current
IEXC1, IEXC2
IEXC3
Initial Tolerance at 25∞C
Drift
Initial Current Matching at 25∞C
(between IEXC1 and IEXC2)
Drift Matching
(between IEXC1 and IEXC2)
Initial Current Matching at 25∞C
(between 8 ϫ IEXC3 and
IEXC1/IEXC2)
Drift Matching
(between 8 ϫ IEXC3 and
IEXC1/IEXC2)
Line Regulation
IEXC1, IEXC2
IEXC3
Load Regulation
Output Compliance
LOW-SIDE POWER SWITCHES
(SW1 and SW2)
RON
Allowable Current2
200
25
± 10
200
± 2.5
± 2.5
20
±5
±5
20
1.25
2.6
1
1
300
VDD – 0.6
GND –30 mV
3
5
4.5
7
20
LOGIC INPUTS
All Inputs Except SCLK and XTAL12
VINL, Input Low Voltage
VINH, Input High Voltage
SCLK Only (Schmitt-Triggered Input)2
VT(+)
VT(–)
VT(+) – VT(–)
VT(+)
VT(–)
VT(+) – VT(–)
XTAL1 Only2
VINL, Input Low Voltage
VINH, Input High Voltage
VINL, Input Low Voltage
VINH, Input High Voltage
Input Currents (except XTAL)
0.8
0.4
2.0
1.4/2
0.8/1.4
0.3/0.85
0.95/2
0.4/1.1
0.3/0.85
0.8
3.5
0.4
2.5
±2
–70
Unit
mA nom
mA nom
% typ
ppm/∞C typ
% max
% typ
ppm/∞C typ
% max
% typ
ppm/∞C typ
mA/V typ
mA/V max
mA/V max
mA/V typ
nA/V typ
V max
V min
W typ
W max
W typ
W max
mA max
V max
V max
V min
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
V max
V min
V max
V min
mA max
mA max
Input Capacitance
10
pF typ
Test Conditions
B Grade, No Load
A Grade, No Load
B Grade, No Load
A Grade, No Load
VDD = 5 V ± 5%
A, B Grades
B Grade
B Grade
A Grade
VDD = 5 V, A and B Grade
B Grade
VDD = 3 V, A and B Grade
B Grade
Continuous Current per Switch
VDD = 5 V
VDD = 3 V
VDD = 3 V or 5 V
VDD = 5 V
VDD = 5 V
VDD = 5 V
VDD = 3 V
VDD = 3 V
VDD = 3 V
VDD = 5 V
VDD = 5 V
VDD = 3 V
VDD = 3 V
VIN = VDD
VIN = GND, Typically –40 mA @ 5 V and
–20 mA at 3 V; Weak Pull-Ups on the
Logic Inputs
All Digital Inputs
–4– REV. A
5 Page 
AD7709–Typical Performance Characteristics
32772
32771
32770
VDD = 5V
INPUT RANGE = ؎20mV
UPDATE RATE = 19.79Hz
32769
32768
32767
32766
32765
32764
0
VREF = 2.5V
TA = 25 C
100 200 300 400 500 600 700 800 900 1000
READING NUMBER
TPC 1. Typical Noise Plot on ±20 mV Input Range
700
600
500
400
300
200
100
0
32766
32767
32768 32769
CODE
32770
TPC 3. Noise Histogram
32771
3.0
2.5 ؎2.56V RANGE
2.0
VDD = 5V
1.5
VREF = 2.5V
INPUT RANGE = ؎2.56V
UPDATE RATE = 19.79Hz
TA = 25؇C
1.0
؎20mV RANGE
0.5
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VREF – V
TPC 2. RMS Noise vs. Reference Input
5.0
VDD = 5V
TA = 25؇C
VDD
OSCILLATOR
TIME BASE = 100ms/DIV
TRACE 1 = TRACE 2 = 2V/DIV
TPC 4. Typical Oscillator Power-Up
–10–
REV. A
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD7709.PDF ] | |
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