AD7718 Datasheet PDF ( Pinout )

AD7718 Datasheet PDF - Analog Devices

Part Number	*AD7718*
Description	ADCs
Manufacturers	Analog Devices
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8-/10-Channel, Low Voltage,

Low Power, ⌺-⌬ ADCs

AD7708/AD7718

FEATURES

8-/10-Channel, High Resolution ⌺-⌬ ADCs

AD7708 Has 16-Bit Resolution

AD7718 Has 24-Bit Resolution

Factory-Calibrated

Single Conversion Cycle Setting

Programmable Gain Front End

Simultaneous 50 Hz and 60 Hz Rejection

VREF Select™ Allows Absolute and Ratiometric

Measurement Capability

Operation Can Be Optimized for

Analog Performance (CHOP = 0) or

Channel Throughput (CHOP = 1)

INTERFACE

3-Wire Serial

SPITM, QSPITM, MICROWIRETM, and DSP-Compatible

Schmitt Trigger on SCLK

POWER

Specified for Single 3 V and 5 V Operation

Normal: 1.28 mA Typ @ 3 V

Power-Down: 30 ␮A (32 kHz Crystal Running)

On-Chip Functions

Rail-to-Rail Input Buffer and PGA

2-Bit Digital I/O Port

GENERAL DESCRIPTION

The AD7708/AD7718 are complete analog front-ends for low

frequency measurement applications. The AD7718 contains a

24-bit Σ-∆ ADC with PGA and can be configured as 4/5 fully-

differential input channels or 8/10 pseudo-differential input

channels. Two pins on the device are configurable as analog

inputs or reference inputs. The AD7708 is a 16-bit version of

the AD7718. Input signal ranges from 20 mV to 2.56 V can be

directly converted using these ADCs. Signals can be converted

directly from a transducer without the need for signal conditioning.

The device operates from a 32 kHz crystal with an on-board PLL

generating the required internal operating frequency. The output

data rate from the part is software programmable. The peak-to-

peak resolution from the part varies with the programmed gain

and output data rate.

The part operates from a single 3 V or 5 V supply. When operating

from 3 V supplies, the power dissipation for the part is 3.84 mW typ.

Both parts are pin-for-pin compatible allowing an upgradable

path from 16 to 24 bits without the need for hardware modifica-

tions. The AD7708/AD7718 are housed in 28-lead SOIC and

TSSOP packages.

APPLICATIONS

Industrial Process Control

Instrumentation

Pressure Transducers

Portable Instrumentation

Smart Transmitters

FUNCTIONAL BLOCK DIAGRAM

DVDD DGND

REFIN2(+)/AIN9 REFIN1(+) REFIN2(–)/AIN10 REFIN1(–) XTAL1 XTAL2

AIN1

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

AIN8

AINCOM

OSC

AND

PLL

POS BUF

MUX NEG BUF

PGA

REFIN(+)

REFIN(–)

⌺-⌬ ADC*

*AD7708 16-BIT ADC

*AD7718 24-BIT ADC

AVDD

SERIAL

INTERFACE

AND

CONTROL

LOGIC

AD7708 / AD7718

I/O PORT

DOUT

DIN

SCLK

RDY

RESET

AVDD AGND

SPI and QSPI are trademarks of Motorola Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

VREF Select is a trademark of Analog Devices, Inc.

REV. 0

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties that

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices.

P2 P1

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703

AD7708/AD7718

Parameter

B Grade

Unit

Test Conditions

LOGIC INPUTS (Continued)

SCLK Only (Schmitt-Triggered Input)2

VT(+)

VT(–)

VT(+) – VT(–)

VT(+)

VT(–)

VT(+)–VT(–)

XTAL1 Only2

VINL, Input Low Voltage

VINH, Input High Voltage

VINL, Input Low Voltage

VINH, Input High Voltage

Input Currents

Input Capacitance

1.4/2

0.8/1.4

0.3/0.85

0.95/2

0.4/1.1

0.3/0.85

0.8

3.5

0.4

2.5

± 10

–70

V min/V max

V max

V min

V max

V min

µA max

pF typ

DVDD = 5 V

DVDD = 3 V

DVDD = 5 V

DVDD = 3 V

Logic Input = DVDD

Logic Input = DGND, Typical –40 µA @ 5 V

and –20 µA at 3 V

All Digital Inputs

LOGIC OUTPUTS (Excluding XTAL2)5

VOH, Output High Voltage2

VOL, Output Low Voltage2

VOH, Output High Voltage2

VOL, Output Low Voltage2

Floating State Leakage Current

Floating State Output Capacitance

Data Output Coding

DVDD – 0.6

0.4

± 10

Binary

Offset Binary

V min

V max

V min

V max

µA max

pF typ

DVDD = 3 V, ISOURCE = 100 µA

DVDD = 3 V, ISINK = 100 µA

DVDD = 5 V, ISOURCE = 200 µA

DVDD = 5 V, ISINK = 1.6 mA

Unipolar Mode

Bipolar Mode

SYSTEM CALIBRATION2

Full-Scale Calibration Limit

Zero-Scale Calibration Limit

Input Span

1.05 × FS

–1.05 × FS

0.8 × FS

2.1 × FS

V max

V min

V max

START-UP TIME

From Power-On

From Power-Down Mode

300 ms typ

ms typ

Oscillator Enabled

300

ms typ

Oscillator Powered Down

POWER REQUIREMENTS

Power Supply Voltages

AVDD–AGND

DVDD–DGND

DIDD (Normal Mode)

AIDD (Normal Mode)

DIDD (Power-Down Mode)

AIDD (Power-Down Mode)

Power Supply Rejection (PSR)

Chop Disabled

Chop Enabled

AVDD and DVDD can be operated independently of each other.

2.7/3.6

V min/max

AVDD = 3 V nom

4.75/5.25

V min/max

AVDD = 5 V nom

2.7/3.6

V min/max

DVDD = 3 V nom

4.75/5.25

V min

DVDD = 5 V nom

0.55

mA max

DVDD = 3 V, 0.43 mA typ

0.65

mA max

DVDD = 5 V, 0.5 mA typ

1.1

mA max

AVDD = 3 V or 5 V, 0.85 mA typ

µA max

DVDD = 3 V, 32.768 kHz Osc. Running

µA max

DVDD = 3 V, Oscillator Powered Down

µA max

DVDD = 5 V, 32.768 kHz Osc. Running

µA max

DVDD = 5 V, Oscillator Powered Down

µA max

AVDD = 3 V or 5 V

Input Range = ± 2.56 V, AIN = 1 V

dB min

95 dB typ

100 dB typ

NOTES

1Temperature range is –40°C to +85°C.

2Not production tested, guaranteed by design and/or characterization data at release.

3Following a self-calibration this error will be in the order of the noise for the programmed gain and update selected. A system calibration will completely remove this error.

4Recalibration at any temperature will remove these errors.

5I/O Port Logic Levels are with respect to AVDD and AGND.

Specifications are subject to change without notice.

REV. 0

–5–

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AD7718 Datasheet PDF - Analog Devices

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