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PDF AD7701 Data sheet ( Hoja de datos )
| Número de pieza | AD7701 | |
| Descripción | 16-Bit A/D Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Monolithic 16-Bit ADC
0.0015% Linearity Error
On-Chip Self-Calibration Circuitry
Programmable Low-Pass Filter
0.1 Hz to 10 Hz Corner Frequency
0 V to +2.5 V or ؎2.5 V Analog Input Range
4 kSPS Output Data Rate
Flexible Serial Interface
Ultralow Power
APPLICATIONS
Industrial Process Control
Weigh Scales
Portable Instrumentation
Remote Data Acquisition
LC2MOS
16-Bit A/D Converter
AD7701
FUNCTIONAL BLOCK DIAGRAM
AVDD DVDD AVSS DVSS
14 15 7
6
SC1
4
SC2
17
AD7701
CALIBRATION
SRAM
CALIBRATION
MICROCONTROLLER
13 CAL
AIN 9
VREF 10
16-BIT A/D CONVERTER
ANALOG
MODULATOR
6-POLE GAUSSIAN
LOW-PASS
DIGITAL FILTER
12 BP/UP
11 SLEEP
AGND 8
DGND 5
CLOCK
GENERATOR
SERIAL INTERFACE
LOGIC
20 SDATA
19 SCLK
3 21
CLKIN CLKOUT MODE
16
CS
18
DRDY
GENERAL DESCRIPTION
The AD7701 is a 16-bit ADC that uses a sigma-delta conversion
technique. The analog input is continuously sampled by an analog
modulator whose mean output duty cycle is proportional to the
input signal. The modulator output is processed by an on-chip
digital filter with a six-pole Gaussian response, which updates
the output data register with 16-bit binary words at word rates up
to 4 kHz. The sampling rate, filter corner frequency, and output
word rate are set by a master clock input that may be supplied
externally, or by a crystal controlled on-chip clock oscillator.
The inherent linearity of the ADC is excellent and endpoint
accuracy is ensured by self-calibration of zero and full scale,
which may be initiated at any time. The self-calibration scheme
can also be extended to null system offset and gain errors in the
input channel.
The output data is accessed through a flexible serial port, which
has an asynchronous mode compatible with UARTs and two
synchronous modes suitable for interfacing to shift registers or
the serial ports of industry-standard microcontrollers.
CMOS construction ensures low power dissipation, and a power-
down mode reduces the idle power consumption to only 10 µW.
PRODUCT HIGHLIGHTS
1. The AD7701 offers 16-bit resolution coupled with outstand-
ing 0.0015% accuracy.
2. No missing codes ensures true, usable, 16-bit dynamic range,
removing the need for programmable gain and level-setting
circuitry.
3. The effects of temperature drift are eliminated by on-chip
self-calibration, which removes zero and gain error. External
circuits can also be included in the calibration loop to remove
system offsets and gain errors.
4. A flexible synchronous/asynchronous interface allows the
AD7701 to interface directly to UARTs or to the serial ports
of industry-standard microcontrollers.
5. Low operating power consumption and an ultralow power
standby mode make the AD7701 ideal for loop-powered
remote sensing applications, or battery-powered portable
instruments.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
AD7701
ABSOLUTE MAXIMUM RATINGS1
(TA = 25°C, unless otherwise noted.)
DVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
DVDD to AVDD . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
DVSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6 V
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
AVSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Digital Input Voltage to DGND . . . . –0.3 V to DVDD + 0.3 V
Analog Input
Voltage to AGND . . . . . . . . AVSS – 0.3 V to AVDD + 0.3 V
Input Current to Any Pin Except Supplies2 . . . . . . . . ± 10 mA
Operating Temperature Range
Commercial Plastic (A, B Versions) . . . . . –40°C to +85°C
Industrial CERDIP (A, B Versions) . . . . . . –40°C to +85°C
Extended CERDIP (S, T Versions) . . . . . –55°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . . 300°C
Power Dissipation (Any Package) to 75°C . . . . . . . . . 450 mW
Derates above 75°C by . . . . . . . . . . . . . . . . . . . . . 10 mW/°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Transient currents of up to 100 mA will not cause SCR latch-up.
ORDERING GUIDE
Model
Temperature
Range
Linearity
Error (% FSR)
AD7701AN
AD7701BN
AD7701AR
AD7701BR
AD7701ARS
AD7701AQ
AD7701BQ
AD7701SQ
AD7701TQ
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
0.003
0.0015
0.003
0.0015
0.003
0.003
0.0015
0.003
0.0015
*N = PDIP; Q = CERDIP; R = SOIC; RS = SSOP.
Package
Options*
N-20
N-20
R-20
R-20
RS-28
Q-20
Q-20
Q-20
Q-20
PDIP, CERDIP, SOIC
MODE 1
20 SDATA
CLKOUT 2
19 SCLK
CLKIN 3
18 DRDY
SC1 4
DGND 5
AD7701
TOP VIEW
17 SC2
16 CS
DVSS 6 (Not to Scale) 15 DVDD
AVSS 7
14 AVDD
AGND 8
AIN 9
VREF 10
13 CAL
12 BP/UP
11 SLEEP
PIN CONFIGURATIONS
SSOP
MODE 1
CLKOUT 2
28 SDATA
27 SCLK
CLKIN 3
26 DRDY
SC1 4
25 SC2
DGND 5
24 CS
NC 6
NC 7
DVSS 8
NC 9
23 NC
AD7701
22 NC
TOP VIEW
(Not to Scale) 21 NC
20 DVDD
AVSS 10
19 AVDD
NC 11
18 NC
AGND 12
17 CAL
AIN 13
VREF 14
16 BP/UP
15 SLEEP
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD7701 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
–4– REV. E
5 Page 
AD7701
The output settling of the AD7701 in response to a step input
change is shown in Figure 12. The Gaussian response has fast
settling with no overshoot, and the worst-case settling time to
± 0.0007% (± 0.5 LSB) is 125 ms with a 4.096 MHz master
clock frequency.
The input sampling frequency, output data rate, filter character-
istics, and calibration time are all directly related to the master
clock frequency, fCLKIN, by the ratios given in the specification
table. Therefore, the first step in system design with the AD7701 is
to select a master clock frequency suitable for the bandwidth
and output data rate required by the application.
100
80
60
40
20
0
0 40 80 120 160
TIME – ms
Figure 12. AD7701 Step Response
USING THE AD7701
SYSTEM DESIGN CONSIDERATIONS
The AD7701 operates differently from successive approxima-
tion ADCs or other integrating ADCs. Since it samples the
signal continuously, like a tracking ADC, there is no need for a
start convert command. The 16-bit output register is updated at
a 4 kHz rate, and the output can be read at any time, either
synchronously or asynchronously.
CLOCKING
The AD7701 requires a master clock input, which may be an
external TTL/CMOS compatible clock signal applied to the
CLKIN pin (CLKOUT not used). Alternatively, a crystal of
the correct frequency can be connected between CLKIN and
CLKOUT, when the clock circuit will function as a crystal
controlled oscillator.
ANALOG INPUT RANGES
The AD7701 performs conversion relative to an externally
supplied reference voltage that allows easy interfacing to
ratiometric systems. In addition, either unipolar or bipolar input
voltage ranges may be selected using the BP/UP input. With
BP/UP tied low, the input range is unipolar and the span is 0 to
+VREF. With BP/UP tied high, the input range is bipolar and the
span is ± VREF. In the Bipolar mode, both positive and negative
full scale are directly determined by VREF. This offers superior
tracking of positive and negative full scale and better midscale
(bipolar zero) stability than bipolar schemes that simply scale
and offset the input range.
The digital output coding for the unipolar range is unipolar
binary; for the bipolar range it is offset binary. Bit weights for
the Unipolar and Bipolar modes are shown in Table I. The
input voltages and output codes for unipolar and bipolar ranges,
using the recommended +2.5 V reference, are shown in
Table II.
Table I. Bit Weight Table (2.5 V Reference Voltage)
Unipolar Mode
µV LSBs % FS ppm FS
10 0.26
19 0.5
38 1.00
76 2.00
153 4.00
0.0004
0.0008
0.0015
0.0031
0.0061
4
8
15
31
61
Bipolar Mode
LSBs % FS ppm FS
0.13 0.0002 2
0.26 0.0004 4
0.5 0.0008 8
1.00 0.0015 15
2.00 0.0031 31
Unipolar Mode
Input Relative to
FS and AGND
Input (V)
Table II. Output Coding
Bipolar Mode
Input Relative to
FS and AGND Input (V)
+VREF – 1.5 LSB
+VREF – 2.5 LSB
+VREF – 3.5 LSB
+2.499943
+2.499905
+2.499867
+VREF – 1.5 LSB
+VREF – 2.5 LSB
+VREF – 3.5 LSB
+2.499886
+2.499810
+2.499733
+VREF/2 + 0.5 LSB
+VREF/2 – 0.5 LSB
+VREF/2 – 1.5 LSB
+1.250019
+1.249981
+1.249943
AGND + 0.5 LSB +0.000038
AGND – 0.5 LSB –0.000038
AGND – 1.5 LSB –0.000114
AGND + 2.5 LSB
AGND + 1.5 LSB
AGND + 0.5 LSB
+0.000095
+0.000057
+0.000019
–VREF + 2.5 LSB
–VREF + 1.5 LSB
–VREF + 0.5 LSB
NOTES
1. VREF = 2.5 V
2. AGND = 0 V
3. Unipolar Mode, 1 LSB = 2.5 V/655536 = 0.000038 V
4. Bipolar Mode, 1 LSB = 5 V/65536 = 0.000076 V
5. Inputs are voltages at code transitions.
–10–
–2.499810
–2.499886
–2.499962
Output Data
1111 1111 1111 1111
1111 1111 1111 1110
1111 1111 1111 1101
1111 1111 1111 1100
1000 0000 0000 0001
1000 0000 0000 0000
0111 1111 1111 1111
0111 1111 1111 1110
0000 0000 0000 0011
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
REV. E
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD7701.PDF ] | |
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