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DA7218 Schematic ( PDF Datasheet ) - Dialog Semiconductor

Teilenummer DA7218
Beschreibung Ultra-Low Power Stereo Codec
Hersteller Dialog Semiconductor
Logo Dialog Semiconductor Logo 




Gesamt 30 Seiten
DA7218 Datasheet, Funktion
DA7218
Ultra-Low Power Stereo Codec
General Description
DA7218 is a high-performance, low-power audio codec optimized for use in portable applications or
wearable devices. It has single-ended headphone outputs with headphone detect for use in
accessories, offering excellent left to right channel separation and common mode noise rejection.
DA7218 also has a stereo DAC to headphone output path and ultra-low power operating modes to
support always-on audio detect applications.
DA7218 contains two analog microphone input paths, or up to four digital microphone input paths, or
a combination of both The other chip in this family, the DA7217 has differential headphone outputs
without headphone detect, and has been designed for use inside headset devices.
Key Features
High performance stereo DAC to headphone Flexible digital mixing from all seven inputs to
playback path with 110 dB dynamic range
all six outputs with independent gain on each
4 mW stereo playback power consumption
mixer path
DAC digital filters with audio and voice mode
options, five-band equalizer and five
Ability to run the ADCs at a different sample
rate to the DACs on a single I2S interface
programmable biquad stages
Digital tone generator with built-in support for
Dedicated low-latency digital sideband filter
DTMF
with three programmable biquad stages
System controller for simplified, pop-free start-
High performance microphone to ADC record up and shutdown
path with a 105 dB dynamic range
Phase-locked loop with sample rate tracking
2.5 mW stereo record power consumption
supporting MCLK frequencies from 2 MHz to
ADC digital filters with audio and voice mode
options
54 MHz
Automatic tuning of on-chip reference
500 µW always-on record mode with
oscillator for clock-free operation in low-power
modes
automatic level detection
Hybrid analog / digital automatic level control
4-wire digital audio interface with support for
I2S, four-channel I2S, TDM and other audio
to dynamically control the record level
formats
Shutdown mode offering current consumption 2-wire I2C compatible control interface with
during standby of 2.5 µA
support for High Speed mode up to 3.4 MHz
Two low-noise microphone bias regulators 24-bit data at up to 96 kHz sample rate
with programmable output voltage and ultra-
low power mode
A high efficiency two-level, true-ground charge
Ability to differentiate between stereo and
pump for generating class-G headphone
supplies
mono headsets
Automatic detection of headset removal and
confirmation of headset insertion
Voice mode filtering up to 32 kHz
Applications
Wired headsets
Wired headphones
Audio accessories
Portable media players
Gaming console controllers
Tablets and eBooks
Datasheet
CFR0011-120-00
Revision 2.5
1 of 173
01 Sep 2016
© 2016 Dialog Semiconductor






DA7218 Datasheet, Funktion
DA7218
Ultra-Low Power Stereo Codec
11 Package Information ................................................................................................................. 159
12 External Components ............................................................................................................... 160
13 Ordering Information ................................................................................................................ 160
Appendix A Applications Information ........................................................................................... 161
A.1 Codec Initialization ............................................................................................................ 161
A.2 Automatic Level Control Calibration.................................................................................. 161
Appendix B Components................................................................................................................ 162
B.1 Audio Inputs ...................................................................................................................... 162
B.2 Microphone Bias ............................................................................................................... 163
B.3 Audio Outputs ................................................................................................................... 163
B.4 Headphone Charge Pump ................................................................................................ 164
B.4.1 Single Supply Mode........................................................................................... 164
B.5 Digital Interfaces ............................................................................................................... 165
B.6 References ........................................................................................................................ 166
B.7 Supplies ............................................................................................................................ 167
B.8 Ground .............................................................................................................................. 167
B.9 Capacitor Selection ........................................................................................................... 168
Appendix C PCB Layout Guidelines.............................................................................................. 169
C.1 Layout and Schematic Support ......................................................................................... 169
C.2 General Recommendations .............................................................................................. 170
Revision History .............................................................................................................................. 171
Datasheet
CFR0011-120-00
Revision 2.5
6 of 173
01 Sep 2016
© 2016 Dialog Semiconductor

6 Page









DA7218 pdf, datenblatt
DA7218
Ultra-Low Power Stereo Codec
4.1.5 MCLK
MCLK is the master clock input pin. It is used as the main system clock either directly or via the PLL.
4.1.6 SCL
SCL is the control interface (I2C) clock input and is used in conjunction with SDA to control the
device.
4.1.7 AD
AD is used to select between one of two possible I2C slave addresses by connecting the pin to GND
or VDD_IO. (High = 1B, Low = 1A).
4.1.8 DATIN
DATIN is the data input pin which forms part of the digital audio interface (DAI). It is used to present
audio playback data to the device.
4.2 Output Pins
4.2.1 nIRQ
nIRQ is the open drain active-low interrupt output to alert the host to either an accessory or a level-
detect event.
4.2.2 DATOUT
DATOUT is the data output pin, which forms part of the DAI.
4.3 Bi-Directional Pins
4.3.1 SDA
SDA is the control interface (I2C) data input/output and is used in conjunction with SCL to control the
device.
4.3.2 BCLK
BCLK is the bit clock input/output pin which forms part of the DAI. It is used to clock audio data bits
into or out from the device or both.
4.3.3 WCLK
WCLK is the word clock input/output pin that forms part of the DAI.
4.4 Single-Ended Headphone Pins
4.4.1 HPL
HPL is the left-channel headphone output. It is ground-centered so the headphone speaker can be
connected directly between HPL and ground.
4.4.2 Pin HPR
HPR is the right-channel headphone output. It is ground-centered so the headphone speaker can be
connected directly between HPR and ground.
Datasheet
CFR0011-120-00
Revision 2.5
12 of 173
01 Sep 2016
© 2016 Dialog Semiconductor

12 Page





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