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PDF DA7212 Data sheet ( Hoja de datos )
| Número de pieza | DA7212 | |
| Descripción | Ultra-low power stereo codec | |
| Fabricantes | Dialog Semiconductor | |
| Logotipo |  |
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DA7212
Ultra-low power stereo codec
Company confidential
General description
The DA7212 is an ultra-low power audio codec targeting portable audio devices. The input paths
support stereo FM line input and up to four analogue (or two analogue and two digital) microphones
with two independent microphone biases. Comprehensive analogue mixing and bypass paths to the
output drivers are available.
The headphone output is true-ground Class G with integrated charge pump. There is also a
differential Class AB speaker driver that can serve as a mono lineout.
Digital audio transfer to/from the external processor is via a bi-directional digital audio interface that
supports all common sample rates and formats. The device may be operated in slave or master
modes using the internal PLL which may be bypassed if not required.
To fully optimise each customer application, a range of built in filtering, equalisation and audio
enhancements are available. These are accessible by the processor over the I2C serial interface.
Key features
■ 100 dB SNR stereo audio playback into 16 Ω ■ Built-in 5-band equaliser, ALC and noise-gate
headphones
functions
■ 3.1 mW power consumption for stereo DAC to ■ Built-in beep generator
headphone playback
■ 1.2 W mono speaker driver
■ Integrated system controller to eliminate pops
and clicks
■ 650 µW mono voice record
■ Minimised external component count
■ Stereo digital microphone support
■ 34-ball WL-CSP (4.54 mm x 1.66 mm)
■ Supports up to four analogue microphones
package
■ Two low-noise microphone-bias outputs
■ Staggered 0.5 mm pitch for easy PCB routing
■ Low-power PLL provides system clocking and allowing low cost manufacture
audio sample rate flexibility
Applications
■ Personal Media Players
■ Audio headphone/headsets
■ Wearables
■ Embedded applications
■ Arduino compatible development systems
Datasheet
Figure 1: The DA7212 chip
Revision 3c
1 of 129
24-Nov-2015
© 2015 Dialog Semiconductor
1 page  
DA7212
Ultra-low power stereo codec
Company confidential
Figure 31: Right justified mode............................................................................................................ 56
Figure 32: DSP mode .......................................................................................................................... 57
Figure 33: TDM example (slave mode) ............................................................................................... 58
Figure 34: TDM mode (left justified mode) .......................................................................................... 58
Figure 35: DA7212 package outline drawing .................................................................................... 118
Figure 36: MICBIAS decoupling ........................................................................................................ 123
Figure 37: Recommended headphone layout ................................................................................... 123
Figure 38: Charge pump decoupling ................................................................................................. 124
Figure 39: Charge pump flying capacitor .......................................................................................... 124
Figure 40: I2C pull ups ...................................................................................................................... 125
Figure 41: Reference capacitors ....................................................................................................... 126
Figure 42: Power supply decoupling ................................................................................................. 126
Figure 43: Example layout................................................................................................................. 128
Tables
Table 1: Pin descriptions ....................................................................................................................... 9
Table 2: Pin type definition .................................................................................................................. 10
Table 3: Absolute maximum ratings .................................................................................................... 11
Table 4: Recommended operating conditions..................................................................................... 11
Table 5: Power consumption ............................................................................................................... 12
Table 6: Reference voltage generation ............................................................................................... 12
Table 7: Analogue to digital converter (ADC)...................................................................................... 13
Table 8: Microphone bias .................................................................................................................... 14
Table 9: Input mixing units................................................................................................................... 15
Table 10: ADC/DAC digital high-pass filter cut-off frequencies in music mode .................................. 16
Table 11: ADC/DAC Digital high-pass filter cut-off frequencies in voice mode................................... 16
Table 12: DAC 5-band equaliser frequencies ..................................................................................... 17
Table 13: Beep generator.................................................................................................................... 17
Table 14: Digital to analogue converter (DAC) ................................................................................... 18
Table 15: Class AB lineout amplifier / speaker.................................................................................... 19
Table 16: True ground charge pump................................................................................................... 20
Table 17: True ground headphone amplifier ....................................................................................... 21
Table 18: MCLK input.......................................................................................................................... 22
Table 19: PLL mode ............................................................................................................................ 22
Table 20: Bypass mode....................................................................................................................... 22
Table 21: I/O characteristics................................................................................................................ 23
Table 22: I2C control bus (VDD_IO = 1.8 V) ....................................................................................... 24
Table 23: Digital audio interface timing (I2S/DSP in master/slave mode) .......................................... 25
Table 24: Codec start-up times ........................................................................................................... 26
Table 25: DTMF keypad frequencies .................................................................................................. 34
Table 26: Charge pump output voltage control ................................................................................... 37
Table 27: CP_THRESH_VDD2 settings in DAC_VOL mode (CP_MCHANGE = 10)......................... 38
Table 28: CP_THRESH_VDD2 settings in signal size mode (CP_MCHANGE = 11)......................... 38
Table 29: Charge pump current load control....................................................................................... 41
Table 30: ADC/DAC digital high-pass filter specifications in audio mode ........................................... 42
Table 31: Wind noise high-pass filter specifications ........................................................................... 43
Table 32: DAC 5-band equaliser turnover/centre frequencies ............................................................ 44
Table 33: PLL clock modes ................................................................................................................. 47
Table 34: Sample rate control register and corresponding system clock frequency........................... 48
Table 35: PLL input divider.................................................................................................................. 49
Table 36: Example PLL configurations................................................................................................ 50
Table 37: Ordering information.......................................................................................................... 119
Table 38: Offset calibration, MIC1_P and MIC2_P single ended, slave mode ................................. 121
Table 39: Audio inputs....................................................................................................................... 122
Table 40: Microphone bias ................................................................................................................ 123
Table 41: Digital microphones ........................................................................................................... 123
Table 42: Headphone outputs ........................................................................................................... 123
Datasheet
Revision 3c
5 of 129
24-Nov-2015
© 2015 Dialog Semiconductor
5 Page 
DA7212
Ultra-low power stereo codec
Company confidential
4 Absolute maximum ratings
Table 3: Absolute maximum ratings
Parameter Description
Conditions (Note 1)
Min Max Unit
Storage temperature
-65 +165
°C
Ta
VDD_SP
Operating temperature
-40 +85
-0.3 6.0
°C
V
VDD_A
VDD_IO
VDD_MIC
Supply voltages
-0.3 2.75
-0.3 5.5
V
V
SDA
SCL
BCLK
WCLK
DATIN
DATOUT
Digital interface signals
-0.3
VDD_IO
+ 0.3
V
Package thermal resistance
60 °C/W
Note 1
ESD susceptibility
Human body model
2 kV
Stresses beyond those listed under ‘Absolute maximum ratings’ may cause permanent damage to the
device. These are stress ratings only, so functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specification are not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
5 Recommended operating conditions
Table 4: Recommended operating conditions
Parameter Description
Conditions
Min
Ta
VDD_A
Operating temperature
-40
1.6
VDD_IO
Supply voltages
VDD_MIC
1.5
1.8
VDD_SP
0.95
Note 2 If the speaker output is not used then VDD_SP can be left unconnected
Typ
Max Unit
+85 °C
2.65 V
3.6 V
3.6 V
5.25 V
Datasheet
Revision 3c
11 of 129
24-Nov-2015
© 2015 Dialog Semiconductor
11 Page | ||
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