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Teilenummer | PE42452 |
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Beschreibung | SP5T RF Switch | |
Hersteller | Peregrine Semiconductor | |
Logo | ||
Gesamt 11 Seiten Product Description
The PE42452 is a HaRP™ technology-enhanced
absorptive SP5T RF switch designed for use in 3G/4G
wireless infrastructure and other high performance RF
applications.
This switch is a pin-compatible upgraded version of the
PE42451 with 1.8V control logic. It is comprised of five
symmetric RF ports and has very high isolation. An
integrated CMOS decoder facilitates a three-pin low
voltage CMOS control interface and an external negative
supply option. In addition, no external blocking
capacitors are required if 0V DC is present on the RF
ports.
The PE42452 is manufactured on Peregrine’s
UltraCMOS® process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate.
Peregrine’s HaRP™ technology enhancements deliver
high linearity and excellent harmonics performance. It is
an innovative feature of the UltraCMOS® process, offering
the performance of GaAs with the economy and
integration of conventional CMOS.
Figure 1. Functional Diagram
RFC
RF5
ESD
50
RF4
ESD
50
CMOS Control/
Driver and ESD
ESD
50
ESD
50
ESD
50
RF1
RF2
RF3
Product Specification
PE42452
UltraCMOS® SP5T RF Switch
450–4000 MHz
Features
Five symmetric, absorptive RF ports
High isolation
61 dB @ 900 MHz
55 dB @ 2100 MHz
52 dB @ 2700 MHz
44 dB @ 4000 MHz
High linearity
IIP2 of 96 dBm
IIP3 of 57 dBm
1.8V control logic compatible
105°C operating temperature
Fast switching time of 265 ns
Three pin CMOS logic control
External negative supply option
ESD performance
4kV HBM on RF pins to GND
1.5kV HBM on all pins
Figure 2. Package Type
24-lead 4x4 mm QFN
V1 V2 V3 VDD VssEXT (optional) DOC-02114
Document No. DOC-14014-3 │ www.psemi.com
©2013-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 11
PE42452
Product Specification
Typical Performance Data @ 25°C and VDD = 3.3V unless otherwise noted
Figure 7. Isolation vs Temp (RFC–RFX)
Figure 8. Isolation vs VDD (RFC–RFX)
Figure 9. Isolation vs Temp (RFX–RFX)
Figure 10. Isolation vs VDD (RFX–RFX)
©2013-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 11
Document No. DOC-14014-3 │ UltraCMOS® RFIC Solutions
6 Page | ||
Seiten | Gesamt 11 Seiten | |
PDF Download | [ PE42452 Schematic.PDF ] |
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