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PDF AP3301 Data sheet ( Hoja de datos )
| Número de pieza | AP3301 | |
| Descripción | QUASI-RESONANT PWM CONTROLLER | |
| Fabricantes | Diodes | |
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AP3301
QUASI-RESONANT PWM CONTROLLER
Description
Pin Assignments
The AP3301 is a peak-current control, Quasi-Resonant (QR) PWM
controller which is optimized for high performance, low standby power
and cost effective offline flyback converters.
At no load or light load, the IC will enter the burst mode to minimize
standby power consumption. The minimum switching frequency
(about 20kHz) is set to avoid the audible noise. At medium load, the
IC will enter valley lock QR mode with frequency foldback to improve
system efficiency and EMI performance. The maximum switching
frequency (about 120kHz) is set to clamp the QR frequency to
improve efficiency. At low line input & heavy load, when switching
frequency decreases below 62KHz with output load increasing, the IC
will enter CCM mode with fixed switching frequency of 62kHz to
optimize low line power conversion efficiency. Furthermore, the
frequency dithering function is built in to reduce EMI emission.
Internal slope compensation allows more stable peak-current mode
control over wide range of input voltage and load conditions. Internal
piecewise linear line compensation ensures constant output power
limit over entire universal line voltage range.
Comprehensive protection features are included, such as brown out
protection, cycle-by-cycle current limit (OCP), VCC Over Voltage
Protection (VOVP), Secondary-Side Output OVP (SOVP), internal
OTP, Over Load Protection (OLP) and pins’ fault protection.
(Top View)
Pin 1 Mark
GND 1
FB 2
DEM 3
6 GATE
5 VCC
4 SENSE
SOT26
Applications
Features
Very Low Start-up Current
Multi-Mode Control
Quasi-Resonant Operation with Valley Lock
Fixed Frequency CCM Operation at Low Line Heavy Load
Non-Audible-Noise Quasi-Resonant Control
Internal Slope Compensation
Soft Start During Startup Process
Frequency Fold Back for High Average Efficiency
Secondary Winding Short Protection with FOCP
Frequency dithering for Reducing EMI
VCC Maintain Mode
Useful Pin Fault Protection:
SENSE Pin Floating
FB/Opto-coupler Open/Short
Comprehensive System Protection Feature:
VCC Over Voltage Protection (VOVP)
Over Load Protection (OLP)
Brown Out Protection (BNO)
Secondary Side OVP (SOVP)
Mini Size Package of SOT26
Totally Lead-free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Switching AC-DC Adapter/Charger
ATX/BTX Auxiliary Power
Set-Top Box (STB) Power Supply
Open Frame Switching Power Supply
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
AP3301
Document number: DS38018 Rev. 4 - 2
1 of 16
www.diodes.com
June 2016
© Diodes Incorporated
1 page  
Electrical Characteristics (@TA = -40 to +85°C, VCC =18V, unless otherwise specified.)
Symbol
Parameter
Conditions
Supply Voltage (VCC Pin)
IST
Startup Current
–
ICC
ICC-FAULT
VST
VM
VUVLO
VCC-OVP
Operating Supply Current
Operating Current If Fault
Occurs
Startup Voltage
VCC Maintain
Shutdown Voltage
VCC OVP
VFB=4V, CL=0nF (Note 5)
VFB=4V, VCS=0V (Note 5)
–
–
–
–
PWM Section/Oscillator Section
fOSC-CCM
fOSC-MAXC
fOSC-GREEN
CCM Oscillation
Frequency
Maximum Clamp
Frequency
Green Mode Frequency
–
–
–
fOSC-JITTER
Frequency Dithering
CCM (Note 6)
Current Sense Section (SENSE Pin)
VCS-MAX
VTH-FOCP
tDELAY-FOCP
tLEB
tDELAY-CS
Maximum SENSE Voltage
FOCP Voltage
FOCP Debounce Time
(Note 6)
LEB Time of SENSE
Delay to Output (Note 6)
IDEM_SOURCE=150µA
–
–
–
–
Feedback Input Section (FB Pin)
KFB-CS
The Ratio of Input Voltage
to Current Sense Voltage
RFB Input Impedance
IFB-SOURCE
VFB-GREEN
GQR
VBURST
VFB-OLP
Source Current
The Threshold Enter QR
Mode
QR Mode Frequency
Modulation Slope Versus
VFB
Input Voltage for Zero
Duty
Over Load Protection
tON-MAX
Maximum On Time
tSOFT-ST
tDELAY-OLP
Soft-Start Time
Delay of Over Load
Protection
–
–
VFB=0V
–
–
–
–
–
–
–
Min
–
1.5
0.15
14.5
9.0
7.1
27
57
110
18
–
0.8
1.6
–
150
–
–
15
0.15
–
–
1.35
4
11
–
56
Typ
1
1.8
0.3
15.8
9.4
7.6
28.5
62
120
–
±8
0.88
1.8
6
250
150
3
20
0.25
3
140
1.55
4.5
13
5
–
AP3301
Max Unit
5
2
0.45
16.5
9.8
8.1
30
μA
mA
mA
V
V
V
V
67 kHz
130 kHz
25 kHz
±12 %
0.96
2.0
–
350
–
V
V
Cycles
ns
ns
–
25
0.35
–
–
V/V
kΩ
mA
V
kHz/V
1.75
5
16
–
85
V
V
μs
ms
ms
AP3301
Document number: DS38018 Rev. 4 - 2
5 of 16
www.diodes.com
June 2016
© Diodes Incorporated
5 Page 
Operation Description (Cont.)
5
VCC
3 DEM GATE 6
AP3301
Necessary
R
1 GND SENSE 4
FB C
2
AP3301
Large undershoot (more than
-0.3V) may damage the SENSE pin
Figure 2
Built-in Slope Compensation
It is well known that a continuous current mode SMPS may become unstable when the duty cycle exceeds 50%. The built-in slope compensation
can improve the stability, so there is no need for design engineer to spend much time on that.
FB Pin and Short Circuit Protection
This pin is normally connected to the opto-coupler and always paralleled with a capacitor for loop compensation. When the voltage at this pin is
greater than VFB-OLP and lasts for about tDELAY-OLP, the IC will enter the protection mode. For AP3301, the system will enter hiccup mode to wait
the VCC decreasing to low UVLO level, then the IC will try to restart until the failure removed. And when this voltage is less than 1.55V, the IC will
stop the drive pulse immediately. Therefore, this feature can be used for short circuit protection, which makes the system immune from damage.
Normally, output short makes the VFB value to the maximum because the opto-coupler is cut off.
When VCC decreases to a setting threshold, the VCC maintain comparator will output some drive signal to make the system switch and provide a
proper energy to VCC pin. The VCC maintain function will cooperate with the PWM and burst mode loop which can make the output voltage
variation be within the regulation. This mode is very useful for reducing startup resistor loss and achieving a better standby performance with a
low value VCC capacitor. The VCC is not easy to touch the shutdown threshold during the startup process and step load. This will also simplify the
system design. The minimum VCC voltage is suggested to be designed a little higher than VCC maintain threshold thus can achieve the best
balance between the standby and step load performance.
Brown-in/Brown-out
During turning-on interval of primary power MOSFET, the DEM pin is clamped to GND, the current flows through RDEM and pin DEM reflecting
the rectified value of AC line voltage as showed as Figure 3, this current multiplies with RBNO represents the sample voltage of AC line voltage,
take the peak value of the sample voltage to compare with the internal fixed threshold.
When the AC source is on, the IC will send several drive signals to confirm that the DEM pin current is higher than IBNI during primary MOSFET
turning on time, then AP3301 starts to provide drive signal, and if the current decreases below IBNO for about 50ms, AP3301 enters brown out
protection and no drive pulse output, a new startup will not begin until the sampled signal is lower than IBNI again and VCC is higher than VUVLO
threshold.
AP3301
Document number: DS38018 Rev. 4 - 2
11 of 16
www.diodes.com
June 2016
© Diodes Incorporated
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AP3301.PDF ] | |
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