|
|
PDF A1469 Data sheet ( Hoja de datos )
| Número de pieza | A1469 | |
| Descripción | Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC | |
| Fabricantes | Allegro | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de A1469 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
|
No Preview Available !
A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
FEATURES AND BENEFITS
• Unique design for robustness against high power EMC
transients
• Peak detection based switching algorithm for large
operating air gaps
• Minimum differential field 20 Gpk-pk
• Running mode calibration for continuous optimization
• Precise duty cycle signal throughout operating
temperature range
• Automatic Gain Control (AGC) for air-gap–independent
switchpoints
• Automatic Offset Adjustment (AOA) for signal
processing optimization
• True zero-speed operation
• Scan and IDDQ for increased test coverage
PACKAGE:
4-pin SIP (suffix K)
Not to scale
DESCRIPTION
TheA1469 is an optimized Hall effect sensing IC that provides
a user-friendly solution for digital ring-magnet sensing, or
when coupled with a magnet, ferromagnetic target sensing,
in three-wire applications. The small device package can be
easily assembled into applications for use in conjunction with
a wide variety of target shapes and sizes.
The integrated circuit incorporates dual Hall effect elements
with a 2.2 mm spacing and signal processing that switches
in response to differential magnetic signals created by ring-
magnet poles. The circuitry contains a sophisticated digital
circuit to reduce system offsets, to calibrate the gain for air-
gap–independent switchpoints, and to achieve true zero-speed
operation. Signal optimization occurs at power-on through
the combination of offset and gain adjust, and is maintained
throughout the operating time with the use of a running-mode
calibration. The running-mode calibration provides immunity
to environmental effects such as micro-oscillations of the target
or sudden air gap changes.
The device is ideally suited to obtaining speed and duty cycle
information in ring-magnet–based speed, position, and timing
applications, such as in speedometers.
The A1469 is available in a 4-pin SIP (suffix K) package. The
package is lead (Pb) free, with 100% matte tin leadframe plating.
VCC
E1
Hall
Amplifier
E2
Automatic Offset
Adjustment (AOA)
Control
∑
AOA DAC
Gain
Internal
Regulator
A1469-DS
Automatic Gain
Control (AGC)
AGC DAC
Test Signals
TEST
Tracking DAC
Peak Hold
+
–
Functional Block Diagram
Current
Limit
OUT
GND
1 page  
A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
CHARACTERISTIC PERFORMANCE
7
6
5
4
3
2
1
0
-50
Supply Current (Output On) versus Temperature
Vcc (V)
4
12
26.5
-25 0
25 50 75 100 125 150
Ambient Temperature(, TA °C)
Supply Current (Output On) versus Supply Voltage
7
6
5
4
TA (°C)
3 -40
2 25
1 85
150
0
0 5 10 15 20 25 30
Supply Voltage, Vcc (V)
7
6
5
4
3
2
1
0
-50
Supply Current (Output Off) versus Temperature
Vcc (V)
4
12
26.5
-25 0
25 50 75 100 125 150
Ambient Temperature, TA (°C)
Supply Current (Output Off) versus Supply Voltage
7
6
5
4
TA (°C)
3 -40
2 25
1 85
150
0
0 5 10 15 20 25 30
Supply Voltage, Vcc (V)
Output Saturation Voltage versus Temperature
500
450
IOUT(mA)
10
400 15
350 20
300 25
250
200
150
100
50
0
-50
-25
0
25 50 75 100 125
Ambient Temperature, TA (°C)
150
Output Saturation Voltage versus Output Current
500
450 TA (°C)
400 -40
350 25
300 85
250
200
150
150
100
50
0
0 5 10 15 20 25
Output Current, IOUT(mA)
30
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
5 Page 
A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
Power Supply Protection
The device contains an on-chip regulator and can operate
throughout a wide VCC range. For devices that must be operated
from an unregulated power supply, transient protection must
be added externally. For applications using a regulated line,
EMI/ RFI protection may still be required. Contact Allegro for
information on the circuitry required for compliance with various
EMC specifications. Refer to figure 6 for an example of a basic
application circuit.
Undervoltage Lockout
When the supply voltage falls below the undervoltage lockout
voltage, VCC(uv) , the device enters Reset, where the output state
returns to the Power-On State (POS) until sufficient VCC
is supplied.
Assembly Description
This device is integrally molded into a plastic body that has been
optimized for size, ease of assembly, and manufacturability. High
operating temperature materials are used in all aspects of con-
struction.
Device Operation
Each operating mode is described in detail below.
POWER-ON
When power (VCC > VCC(min)) is applied to the device, a short
period of time is required to power the various portions of the
IC. During this period, the A1469 powers-on in the high voltage
state, VOUT(high), and the digital tracking DAC gets ready to
Vsupply
track the VPROC signal. After power-on, there are conditions that
could induce a change in the output state. Such an event could be
caused by thermal transients, but would require a static applied
magnetic field, proper signal polarity, and particular direction and
magnitude of internal signal drift.
INITIAL OFFSET ADJUST
The device initially cancels the effects of chip, magnet, and
installation offsets. After offsets have been cancelled, the device
is ready to provide the first output switch. The period of time
required for both Power-On and Initial Offset Adjust is defined as
the Power-On Time.
CALIBRATION MODE
The calibration mode allows the device to automatically select
the proper signal gain and continue to adjust for offsets. The
AGC is active, and selects the optimal signal gain based on the
amplitude of the VPROC signal. Following each adjustment to the
AGC DAC, the Offset DAC is also adjusted to ensure the internal
analog signal is properly centered.
During this mode, the tracking DAC is active and output switch-
ing occurs, but the duty cycle is not guaranteed to be within
specification.
RUNNING MODE
After the Initial Calibration period, CI, establishes a signal gain,
the device moves to running mode. During running mode, the
device tracks the input signal and gives an output edge for every
peak of the signal. AOA remains active to compensate for any
offset drift over time.
CBYP
0.1 µF
VCC
A1469
TEST
OUT
GND
RPU
1 kΩ
VOUT
COUT
Figure 6: Typical Application Diagram
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet A1469.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| A1460A | HiRel FPGAs |  Actel |
| A1468 | Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC |  Allegro MicroSystems |
| A1469 | PNP Transistor - 2SA1469 |  Sanyo Semiconductor Corporation |
| A1469 | Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC | Allegro |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |