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PDF A7125 Data sheet ( Hoja de datos )
| Número de pieza | A7125 | |
| Descripción | 2.4GHz FSK Transceiver | |
| Fabricantes | AMICCOM | |
| Logotipo |  |
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A7125
2.4GHz FSK Transceiver
Document Title
A7125 Data Sheet, 2.4GHz FSK Transceiver with 2M / 1Mbps data rate
Revision History
Rev. No.
0.0
0.1
0.2
0.3
History
Initial issue.
Logo change.
Modify PIN Configuration and Description, Block Diagram,
Electrical Specifications, Diagram of State Machine. Add
Control Register and Function Description.
Add Power Saving FIFO Mode.
Rename GPIO1 and GPIO2 into GIO1 and GIO2.
Issue Date
Aug. 31, 2007
Oct. 18, 2007
July 31, 2008
August 31, 2008
0.4 Modify register recommended value IGFI [2:0] = [000]
Modify register recommended value IGFQ [2:0] = [000]
Delete TWWS function
October 06, 2008
0.5 Modify register recommended value
June 11, 2009
Delay Register I (17h): PDL= [000]
Delay Register II (18h): WSEL= [011]
Battery Detect Register (2Ch): QDS = [1]
Crystal Test Register (32h): XCP= [00]
IFAT Register (36h): IGFI [2:0] = [111], IGFQ [2:0] = [111]
Modify PLL to WPLL settling time when PDL=[000]
If LO is changed, from 20 us to 30 us
If LO is fixed, from 20 us to 10 us
Delete Ext Voltage Measurement function
Add EOPD output to GIO2
Add PASW output to GIO2
Add EOPDS Register
Add section 16.5
1.0 Modify register recommended value
ADC Control (1Fh): CDM= [0]
Modify recommended timing of PASW
Feb., 2010
1.1 Add Note 8 (regulator settling time) in chapter 8.
Nov., 2010
Remark
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Full
Production
Full
Production
Important Notice:
AMICCOM reserves the right to make changes to its products or to discontinue any integrated circuit product or service
without notice. AMICCOM integrated circuit products are not designed, intended, authorized, or warranted to be suitable for
use in life-support applications, devices or systems or other critical applications. Use of AMICCOM products in such
applications is understood to be fully at the risk of the customer.
Nov., 2010, v1.1
1 AMIC Communication Corporation
1 page  
A7125
2.4GHz FSK Transceiver
1. Typical Application
n 2.4GHz ISM band Communication System
n 2.4GHz Remote Control
n Wireless Keyboard and Mouse
■ Wireless Intelligent sports
■ Wireless Toy and Gaming
■ Wireless Audio/Video Streaming
2. General Description
A7125 is a high performance and low cost 2.4GHz ISM band wireless transceiver. It integrates high sensitivity receiver
(-90dBm @2Mbps), high efficiency power amplifier (up to 3dBm), frequency synthesizer and base-band modem. In typical
system, A7125 is used together with MCU (microcontroller) with very few external passive components. A7125 supports
both FIFO mode and direct mode that contains clock recovery circuit CKO pin to MCU.
A7125 supports very fast settling time (90 us) for frequency hopping system. For packet handling, A7125 has built-in
separated 64-bytes TX/RX FIFO (could be extended to 256 bytes) for data buffering and burst transmission, CRC for error
detection, FEC for 1-bit data correction per code word, RSSI for clear channel assessment, data whitening for data
encryption/decryption, thermal sensor for monitoring relative temperature. Those functions are very easy to use while
developing a wireless system. All features are integrated in a small QFN 4X4 20 pins package.
A7125’s data rate is up to 2Mbps and can be easily programmed to 1Mbps or 2 Mbps via 3-wire or 4-wire SPI bus. For
power saving, A7125 supports sleep mode, idle mode, standby mode. For easy-to-use, A7125 has an unique SPI
command set called Strobe command that are used to control A7125’s state machine. Based on Strobe commands, from
power saving, TX delivery, RX receiving, channel monitoring, frequency hopping to auto calibrations, MCU only needs to
define A7125’s control registers and send Strobe commands via SPI bus. In addition, A7125 supports two general purpose
I/O pins, GIO1 and GIO2, to inform MCU its status so that MCU could use either polling or interrupt scheme to do radio
control. Therefore, it is very easy to monitor transmission between MCU and A7125 because of its digital interface.
3. Feature
n Small size (QFN 4X4, 20 pins).
n Support 2400 ~ 2483.5 MHz ISM band.
n FSK modulation.
n Programmable data rate to 1Mbps or 2Mbps.
n Low current consumption: RX 17mA, TX 15.7mA (at 0dBm output power).
n Low sleep current (1.5uA).
n Programmable RF output power -20dBm ~ 3dBm.
n Very High sensitivity (-90dBm@2Mbps, -92dBm@1Mbps).
n On chip regulator, supports input voltage 2.0 ~ 3.6V.
n Easy to use
u Support 3-wire or 4-wire SPI.
u Unique Strobe command via SPI.
u Change frequency channel by ONE register setting.
u 8-bits Digital RSSI for clear channel indication.
u Fast exchange mode during TRX role switching.
u Auto RSSI measurement.
u Auto Calibrations.
u Auto IF function.
u Auto CRC Check.
u Auto FEC by (7, 4) Hamming code (1 bit error correction / code word).
u Data Whitening for encryption and decryption.
u Separated 64 bytes RX and TX FIFO.
u Easy FIFO / Segment FIFO / FIFO Extension (up to 256 bytes).
u Support direct mode with recovery clock output to MCU.
u Support direct mode with frame sync signal to MCU.
n Support low cost crystal (6 / 8 /12 / 16MHz).
n Support low accuracy crystal within ± 50ppm.
n Support Auto Frequency Compensation.
n Support crystal sharing, (1 / 2 / 4 / 8MHz) to MCU.
n Fast settling time synthesizer for frequency hopping system.
n Built-in thermal sensor for monitoring relative temperature.
n Built-in Battery Detector.
Nov., 2010, v1.1
5 AMIC Communication Corporation
5 Page 
A7125
2.4GHz FSK Transceiver
Digital IO DC characteristics
High Level Input Voltage (VIH)
Low Level Input Voltage (VIL)
High Level Output Voltage (VOH)
Low Level Output Voltage (VOL)
@IOH= -0.5mA
@IOL= 0.5mA
0.8*VDD
0
VDD-0.4
0
VDD
0.2*VDD
VDD
0.4
V
V
V
V
Note 1: When digital I/O pins are configured as input, those pins shall NOT be floating but pull either high or low (SCS shall
be pulled high only); otherwise, more leakage current will be induced in all operation modes.
Note 2: Refer to Delay Register II (18h) to set up crystal settling delay.
Note 3: If 6MHz external crystal is selected, A7125 only supports 1Mbps data rate.
Note 4: Refer to Delay Register I (17h) to set up PDL (PLL settling delay).
Note 5: With external RF filter that provides minimum 17dB of attenuation in the band: 30MHz ~ 2GHz and 3GHz
~12.75GHz.
Note 6: Refer to Delay Register I (17h) to set up TDL delay.
Note 7: The power level of wanted signal is set at sensitivity +3dB. The modulation data for wanted signal and interferer
are PN9 and PN15, respectively. Channel spacing is 2MHz.
Note 8: When VDD < 2.1V and temperature < -30 degree C, the regulator settling time will arise up to 20ms.
Nov., 2010, v1.1
11 AMIC Communication Corporation
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet A7125.PDF ] | |
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