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PDF A2I20H060GNR1 Data sheet ( Hoja de datos )
| Número de pieza | A2I20H060GNR1 | |
| Descripción | RF LDMOS Wideband Integrated Power Amplifiers | |
| Fabricantes | Freescale Semiconductor | |
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Freescale Semiconductor
Technical Data
Document Number: A2I20H060N
Rev. 0, 2/2016
RF LDMOS Wideband Integrated
Power Amplifiers
The A2I20H060N wideband integrated circuit is an asymmetrical Doherty
designed with on--chip matching that makes it usable from 1800 to 2200 MHz.
This multi--stage structure is rated for 26 to 32 V operation and covers all typical
cellular base station modulation formats.
1800 MHz
Typical Doherty Single--Carrier W--CDMA Characterization Performance:
VDD = 28 Vdc, IDQ1A = 24 mA, IDQ2A = 145 mA, VGS1B = 1.65 Vdc,
VPGroSb2aBb=ilit1y.3onVdCcC, DPFou. t(1=) 12 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Frequency
Gps
(dB)
PAE
(%)
ACPR
(dBc)
1805 MHz
1840 MHz
1880 MHz
28.5 42.7 –37.4
28.4 43.8 –37.8
28.1 43.1 –34.7
2100 MHz
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQ1A = 24 mA, IDQ2A = 145 mA, VGS1B = 1.65 Vdc, VGS2B = 1.3 Vdc,
Pout = 12 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. (1)
Frequency
Gps
(dB)
PAE
(%)
ACPR
(dBc)
2110 MHz
27.8 42.3 –36.0
2140 MHz
27.5 42.2 –38.3
2170 MHz
27.3 42.2 –37.7
Features
Advanced High Performance In--Package Doherty
On--Chip Matching (50 Ohm Input, DC Blocked)
Integrated Quiescent Current Temperature Compensation with
Enable/Disable Function (2)
Designed for Digital Predistortion Error Correction Systems
A2I20H060NR1
A2I20H060GNR1
1800–2200 MHz, 12 W AVG., 28 V
AIRFAST RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
TO--270WB--15
PLASTIC
A2I20H060NR1
TO--270WBG--15
PLASTIC
A2I20H060GNR1
1. All data measured in fixture with device soldered to heatsink.
2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.
Freescale Semiconductor, Inc., 2016. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2I20H060NR1 A2I20H060GNR1
1
1 page  
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max Unit
Functional Tests (1,2,3) (In Freescale Doherty Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A = 24 mA, IDQ2A = 145 mA,
VGS1B = 1.65 Vdc, VGS2B = 1.3 Vdc, Pout = 12 W Avg., f = 1842.5 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps 27.5 28.9 30.9 dB
Power Added Efficiency
PAE 42.0 47.3
—
%
Adjacent Channel Power Ratio
ACPR
—
–34.5
–30.0
dBc
Pout @ 3 dB Compression Point, CW
P3dB
65
74
—
W
Load Mismatch (2) (In Freescale Doherty Production Test Fixture, 50 ohm system) IDQ1A = 24 mA, IDQ2A = 145 mA, VGS1B = 1.65 Vdc,
VGS2B = 1.3 Vdc, f = 1840 MHz
VSWR 10:1 at 32 Vdc, 80 W CW Output Power
(3 dB Input Overdrive from 69 W CW Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A = 24 mA,
IDQ2A = 145 mA, VGS1B = 1.65 Vdc, VGS2B = 1.3 Vdc, 1805–1880 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
63
—
Pout @ 3 dB Compression Point (4)
P3dB
—
74
—
AM/PM
(Maximum value measured at the P3dB compression point across
the 1805–1880 MHz frequency range.)
— –15 —
W
W
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
VBWres
—
120
—
MHz
Quiescent Current Accuracy over Temperature (5)
with 2 k Gate Feed Resistors (–30 to 85C) Stage 1
with 2 k Gate Feed Resistors (–30 to 85C) Stage 2
Gain Flatness in 75 MHz Bandwidth @ Pout = 12 W Avg.
Gain Variation over Temperature
(–30C to +85C)
IQT
GF
G
— 1.0 —
— 2.0 —
%
— 0.3 — dB
— 0.026 — dB/C
Output Power Variation over Temperature
(–30C to +85C)
P1dB
—
0.011
— dB/C
Table 6. Ordering Information
Device
Tape and Reel Information
Package
A2I20H060NR1
A2I20H060GNR1
R1 Suffix = 500 Units, 44 mm Tape Width, 13--inch Reel
TO--270WB--15
TO--270WBG--15
1. Part internally input matched.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull
wing (GN) parts.
4. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal
where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
5. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current
Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.
RF Device Data
Freescale Semiconductor, Inc.
A2I20H060NR1 A2I20H060GNR1
5
5 Page 
Table 11. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ1B = 43 mA, VGS2B = 1.3 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
f
(MHz)
1805
Zsource
()
35.1 – j7.58
Zin
()
36.1 + j8.10
Zload (1)
()
2.33 – j0.53
Gain (dB)
28.6
P1dB
(dBm)
46.5
(W)
45
1840
33.9 – j9.77
35.8 + j8.91
2.23 – j0.44
28.6
46.6 45
1880
36.6 – j10.5
37.3 + j8.43
2.22 – j0.35
28.5
46.5 45
Max Output Power
f
(MHz)
1805
Zsource
()
35.1 – j7.58
Zin
()
38.7 + j9.21
Zload (2)
()
2.56 – j0.71
Gain (dB)
26.5
P3dB
(dBm)
47.2
(W)
52
1840
33.9 – j9.77
38.7 + j9.51
2.44 – j0.60
26.4
47.2 52
1880
36.6 – j10.5
40.5 + j8.27
2.43 – j0.48
26.4
47.1 51
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 12. Peaking Side Load Pull Performance — Maximum Efficiency Tuning
VDD = 28 Vdc, IDQ1B = 43 mA, VGS2B = 1.3 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
f
(MHz)
1805
Zsource
()
35.1 – j7.58
Zin
()
32.3 + j11.3
Zload (1)
()
0.81 + j2.03
Gain (dB)
29.2
P1dB
(dBm)
41.8
(W)
15
1840
33.9 – j9.77
32.9 + j12.8
0.84 + j1.97
28.8
41.8 15
1880
36.6 – j10.5
35.1 + j12.5
0.96 + j1.83
28.9
42.4 17
Max Drain Efficiency
f
(MHz)
1805
Zsource
()
35.1 – j7.58
Zin
()
34.1 + j11.5
Zload (2)
()
0.83 + j1.85
Gain (dB)
27.4
P3dB
(dBm)
42.7
(W)
19
1840
33.9 – j9.77
34.8 + j12.0
1.07 + j1.56
27.5
43.8 24
1880
36.6 – j10.5
37.7 + j10.8
1.45 + j1.41
27.4
44.9 31
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin = Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Zsource Zin
Device
Under
Test
Output Load Pull
Tuner and Test
Circuit
Zload
D
(%)
57.5
58.0
57.0
AM/PM
()
–16
–17
–15
D
(%)
58.2
58.4
57.6
AM/PM
()
–21
–22
–20
D
(%)
73.5
72.7
70.3
AM/PM
()
–56
–62
–67
D
(%)
72.9
71.8
69.5
AM/PM
()
–49
–53
–32
RF Device Data
Freescale Semiconductor, Inc.
A2I20H060NR1 A2I20H060GNR1
11
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