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PDF RT8130B Data sheet ( Hoja de datos )
| Número de pieza | RT8130B | |
| Descripción | 12V High Efficiency Synchronous Buck PWM Controller | |
| Fabricantes | Richtek | |
| Logotipo |  |
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®
RT8130B
12V High Efficiency Synchronous Buck PWM Controller
General Description
The RT8130B is a high efficiency single phase
synchronous Buck DC/DC controller with 5V/12V supply
voltage.
The RT8130B has embedded MOSFET gate driver with
high driving capability, supporting driving voltage up to 12V
for high output current application. This device uses
lossless low-side MOSFET RDS(ON) current sense
technique for over-current protection with adjustable
threshold set by the LGATE pin (LGOCS). Other features
include power good indication, enable/disable control and
internal soft-start. The RT8130B also provides fault
protection functions to protect the power stage output.
With above functions, the IC provides customers a cost-
effective solution for high efficiency power conversion. The
RT8130B is available in the WDFN-10L 3x3 package.
Applications
Motherboard, Memory/Chip-set Power
Graphic Card, GPU/Memory Core Power
Low Voltage, High Current DC/DC Regulator
Features
High Light Load Efficiency
Single 5V to 12V Driver Voltage
Integrated High Driving Capability N-MOSFET Gate
Drivers
300kHz Fixed Frequency Internal Oscillator
85% Maximum PWM Duty Cycle
Power Good Indicator
Enable/Disable Control
Internal Soft-Start
Lossless Low-Side MOSFET RDS(ON) Current Sensing
for Over-Current Fault Monitoring
LGATE Over-Current Setting (LGOCS)
Dedicated Output Voltage Monitor
OCP, UVP, OVP, OTP, UVLO
Ordering Information
RT8130B
Package Type
QW : WDFN-10L 3x3 (W-Type)
Note :
Lead Plating System
G : Green (Halogen Free and Pb Free)
Richtek products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Simplified Application Circuit
VCC
VPGOOD
EN
RT8130B
VCC
BOOT
UGATE
PGOOD
COMP/EN
PHASE
LGATE
GND
FB
VIN
VOUT
Copyright ©2015 Richtek Technology Corporation. All rights reserved.
DS8130B-00 June 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
1 page  
RT8130B
Parameter
Symbol
Test Conditions
Soft-Start Interval
tSS VFB from 0V to 0.8V
Reference Voltage
VREF
Protection
Thermal Shutdown Limit
TSD
Over-Voltage Threshold
VOVP
Relative to FB Voltage
Under-Voltage Threshold
VUVP
Relative to FB Voltage
OC Current Source
IOC
OC Preset Trigger Voltage
VOC_Preset
Over Current Setting Time Delay tOCP
ROCSET is Not Populated
From VCC > 4.5V to Soft-Start
MOSFET Gate Driver
UGATE Drive Source
LGATE Drive Source
UGATE Drive Sink
IUGATEsr
ILGATEsr
RUGATEsk
VBOOT – VPHASE = 12V, Max
Source Current
VLGATE = 12V, Max Source
Current
VUGATE – VPHASE = 0.1V
LGATE Drive Sink
RLGATEsk VLGATE = 0.1V
Dead Time
tDEAD
PWM Controller
EA Open Loop Gain
GEA (Note 5)
EA Bandwidth
BW (Note 5)
Maximum Duty
DMAX
Ramp Valley
Ramp Amplitude
VOSC
VIN = 12V
COMP/EN Disable Threshold
PWM Frequency
fOSC
PGOOD Threshold
VPGOOD_H Relative to FB Voltage
VPGOOD_L Relative to FB Voltage
PGOOD Low Level
VOL_PGOOD Sink Current = 4mA
EN to Soft-Start Delay
tDELAY_EN (Note 5)
Min Typ Max Unit
3 -- 7 ms
0.793 0.8 0.807 V
-- 165 -- C
115 125 135 %
-- 75 -- %
9 10 11 A
-- 0.6 --
V
-- -- 5 ms
-- 1.5 --
A
-- 1.5 --
A
-- 1.8 --
-- 1.2 --
-- 30 -- ns
-- 80 -- dB
-- 15 -- MHz
-- 88 -- %
-- 0.9 --
V
-- 1.6 --
V
-- -- 0.3 V
270 300 330 kHz
0.86 0.89 0.92
0.68 0.71 0.74
V
-- -- 0.4 V
-- -- 500 s
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by design.
Copyright ©2015 Richtek Technology Corporation. All rights reserved.
DS8130B-00 June 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
5 Page 
RT8130B
low-side MOSFET so that the output capacitor is
discharged. Although the LGATE voltage may be high
enough to turn on the low-side MOSFET, the OCP
threshold voltage is internally clamped at 600mV (typical)
and stored as the preset value.
Although the OCP threshold voltage is internally clamped
at 600mV when ROCSET is not connected, this preset
threshold voltage may be very high to most of applications.
Hence, it is recommended to keep the ROCSET always
well-connected to protect the converter from over-current
condition.
VCC
IOCSET
Control Logic
Current Sense
OC and OCP
Comparator
x1
VCC
PHASE L
LGATE
ROCSET
Figure 2. OCP Threshold Setting
Bootstrap Circuit
Figure 3 shows the bootstrap circuit, which is used for
the high-side MOSFET driving. The CBOOT is used to store
and supply the energy for high-side MOSFET floating drive,
and the DBOOT is used for voltage blocking. Choose the
DBOOT with sufficient voltage rating to block the PHASE
peak voltage (consider switching spike) plus the voltage
VCC.
When the low-side MOSFET is on, the PHASE voltage is
pulled down to ground and the DBOOT conducts to charge
the CBOOT. When the high-side MOSFET driver is on, part
of the charge stored in the CBOOT is transferred to the
high-side MOSFET to turn it on. Use 0.1μF or greater
ceramic capacitor as the CBOOT to ensure the high-side
MOSFET gate driver operation. The CBOOT andDBOOT should
be placed physically close to the BOOT and PHASE pins
to minimize the trace parasitic components.
MOSFET Driver
VGD
BOOT
UGATE
PHASE
DBOOT
CBOOT
RUGATE
VIN
High-Side
MOSFET
Figure 3. Bootstrap Circuit
MOSFET Gate Drivers
In synchronous rectified Buck topology, the dead-time is
utilized to prevent cross conduction of high-side and low-
side MOSFETs. The RT8130B implements non-overlapping
MOSFET gate drivers with dead-time control scheme to
ensure a safe operation of MOSFET switching.
For high output current applications, multiple power
MOSFETs are usually paralleled to reduce the total
RDS(ON). The MOSFET gate driver needs to have higher
driving capability to switch on/off these paralleled
MOSFETs. The RT8130B integrates MOSFET gate drivers
that have high current driving capability to have lower
switching loss and thus better performance of conversion
efficiency. The embedded MOSFET drivers contribute to
the majority of power dissipation of the controller. Therefore,
WDFN package is chosen because of its power dissipation
rating. If gate resistor is not used, the power dissipation
of the controller can be approximately calculated by the
following equation :
PSW = FSW (Qg_High x VBOOT-PHASE + Qg_Low x VCC)
where VBOOT-PHASE represents the voltage across the
bootstrap capacitor.
It is important to make sure that the controller can dissipate
the switching loss and have enough room for safe operation
when power MOSFETs are paralleled.
Inductor Selection
Inductor plays an important role in step-down converters
because the energy from the input power rail is stored in
it and then released to the load. From the viewpoint of
efficiency, the DC resistance (DCR) of inductor should be
as small as possible to minimize the conduction loss. In
addition, because inductor uses most of the board space,
Copyright ©2015 Richtek Technology Corporation. All rights reserved.
DS8130B-00 June 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet RT8130B.PDF ] | |
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