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Número de pieza | CLC446 | |
Descripción | 400MHz/ 50mW Current-Feedback Op Amp | |
Fabricantes | National Semiconductor | |
Logotipo | ||
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CLC446
400MHz, 50mW Current-Feedback Op Amp
November 1998
General Description
The National CLC446 is a very high-speed unity-gain-stable cur-
rent-feedback op amp that is designed to deliver the highest lev-
els of performance from a mere 50mW quiescent power. It pro-
vides a very wide 400MHz bandwidth, a 2000V/µs slew rate and
900ps rise/fall times. The CLC446 achieves its superior speed-
vs-power using an advanced complementary bipolar IC process
and National’s current-feedback architecture.
The CLC446 is designed to drive video loads with very low
differential gain and phase errors (0.02%, 0.03°). Combined with
its very low power (50mW), the CLC446 makes an excellent
choice for NTSC/PAL video switchers and routers. With its very
quick edge rates (900ps) and high slew rate (2000V/µs), the
CLC446 also makes an excellent choice for high-speed, high-
resolution component RGB video systems.
The CLC446 makes an excellent low-power high-resolution A/D
converter driver with its very fast 9ns settling time (to 0.1%) and
low harmonic distortion.
The combination of high performance and low power make
the CLC446 useful in many high-speed general purpose
applications. Its current-feedback architecture maintains consistent
performance over a wide gain range and signal levels. DC gain
and bandwidth can be set independently. Also, either maximally
flat AC response or linear phase response can be emphasized.
Features
s 400MHz bandwidth (Av = +2)
s 5mA supply current
s 0.02%, 0.03° differential gain, phase
s 2000V/µs slew rate
s 9ns settling to 0.1%
s 0.05dB gain flatness to 100MHz
s -65/-78dBc HD2/HD3
Applications
s High resolution video
s A/D driver
s Medical imaging
s Video switchers & routers
s RF/IF amplifier
s Communications
s Instrumentation
Non-Inverting
Frequency Response (Av = +2)
8
Vo = 0.5Vpp
6
4
2
0
-2
1M
10M 100M
Frequency (Hz)
1G
Typical Application
Elliptic-Function Low Pass Filter
R1 R2
C1
Vin +
C3 C4 C2 R4
CLC446
-
R3
Rg Rf
© 1998 National Semiconductor Corporation
Printed in the U.S.A.
Vo
R5
C5
Pinout
DIP & SOIC
VEE
VCC
http://www.national.com
1 page DC Gain (unity gain buffer)
The recommended Rf for unity gain buffers is 453Ω. Rg
is left open. Parasitic capacitance at the inverting node
may require a slight increase of Rf to maintain a flat
frequency response.
DC Gain (inverting)
The inverting DC voltage gain for the configuration
shown in Figure 2 is
Av
=
− Rf
Rg
.
VCC
6.8µF
+
Rt
3
7
+
0.1µF
CLC446 6
2-
4 Rf
Iin 0.1µF
Vo
VCC
6.8µF
+
+
6.8µF
VEE
Rt
Vin Rg
3
7
+
0.1µF
CLC446 6
2-
4
Rf
0.1µF
Vo
+
6.8µF
VEE
Figure 2: Inverting Gain
The normalized gain plots in the Typical Performance
Characteristics section show different feedback
resistors (Rf) for different gains. These values of Rf are
recommended for obtaining the highest bandwidth with
minimal peaking. The resistor Rt provides DC bias for the
non-inverting input.
For |Av| < 5, use linear interpolation on the nearest Av val-
ues to calculate the recommended value of Rf. For |Av|
≥ 5, the minimum recommended Rf is 200Ω.
Select
Rg
to
set
the
DC
gain:
Rg =
Rf
Av
.
At large
gains, Rg becomes small and will load the previous stage.
This can be solved by driving Rg with a low impedance
buffer like the CLC111, or increasing Rf and Rg.
See the AC Design (small signal bandwidth)
sub-section for the tradeoffs.
DC gain accuracy is usually limited by the tolerance of Rf
and Rg.
Figure 3: Transimpedance Gain
DC Design (level shifting)
Figure 4 shows a DC level shifting circuit for inverting
gain configurations. Vref produces a DC output level
shift of
−
Vref
⋅
Rf
Rref
, which is independent of the DC
output produced by Vin.
Rt
Vin Rg
Vref Rref
+
CLC446
-
Rf
Vo
Figure 4: Level Shifting Circuit
DC Design (single supply)
Figure 5 is a typical single-supply circuit. R1 and R2 form
a voltage divider that sets the non-inverting input DC volt-
age. This circuit has a DC gain of 1. A low
frequency zero is set by Rg and C2. The coupling capac-
itor C1 isolates its DC bias point from the
previous stage. Both capacitors make a high pass
response; high frequency gain is determined by Rf and Rg.
VCC
R1
Vin
C1
R2
VCC
+
CLC446
-
Rf
Vo
DC Gain (transimpedance)
Figure 3 shows a transimpedance circuit where the cur-
rent Iin is injected at the inverting node. The current
source’s output resistance is much greater than Rf.
The DC transimpedance gain is:
AR
=
Vo
Iin
= −Rf
Rg
C2
Figure 5: Single Supply Circuit
The complete gain equation for the circuit in Figure 5 is:
The recommended Rf is 453Ω. Parasitic capacitance at
the inverting node may require a slight increase of Rf to
maintain a flat frequency response.
DC gain accuracy is usually limited by the tolerance of Rf.
Vo =
sτ1
⋅
1+
sτ
2
⋅
1+
Rf
Rg
Vin 1+ sτ1
1+ sτ2
5 http://www.national.com
5 Page This page intentionally left blank.
11 http://www.national.com
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet CLC446.PDF ] |
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CLC446 | 400MHz/ 50mW Current-Feedback Op Amp | National Semiconductor |
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