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PDF CLC440 Data sheet ( Hoja de datos )

Número de pieza CLC440
Descripción High-Speed/ Low-Power/ Voltage Feedback Op Amp
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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N
CLC440
High-Speed, Low-Power, Voltage Feedback Op Amp
June 1999
General Description
The CLC440 is a wideband, low-power, voltage feedback op amp
that offers 750MHz unity-gain bandwidth, 1500V/µs slew rate, and
90mA output current. For video applications, the CLC440 sets new
standards for voltage feedback monolithics by offering the impres-
sive combination of 0.015% differential gain and 0.025° differen-
tial phase errors while dissipating a mere 70mW.
The CLC440 incorporates the proven properties of Comlinear’s
current feedback amplifiers (high bandwidth, fast slewing, etc.) into a
“classical” voltage feedback architecture. This amplifier possesses
truly differential and fully symmetrical inputs both having a high
900kimpedance with matched low input bias currents.
Furthermore, since the CLC440 incorporates voltage feedback, a
specific Rf is not required for stability. This flexibility in choosing Rf
allows for numerous applications in wideband filtering and integration.
Unlike several other high-speed voltage feedback op amps, the
CLC440 operates with a wide range of dual or single supplies
allowing for use in a multitude of applications with limited supply
availability. The CLC440’s low 3.5nV/Hz(en) and 2.5pA/Hz(in)
noise sets a very low noise floor.
Features
s Unity-gain stable
s High unity-gain bandwidth: 750MHz
s Ultra-low differential gain: 0.015%
s Very low differential phase: 0.025°
s Low power: 70mW
s Extremely fast slew rate: 1500V/µs
s High output current: 90mA
s Low noise: 3.5nV/Hz
s Dual ±2.5V to ±6V or single 5V to 12V supplies
Applications
s Professional video
s Graphics workstations
s Test equipment
s Video switching & routing
s Communications
s Medical imaging
s A/D drivers
s Photo diode transimpedance amplifiers
s Improved replacement for CLC420 or OPA620
Frequency Response (AV = +2V/V)
Typical Application
10MHz to 40MHz Square and Triangular Wave Generator
Generator Waveforms
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
Pinout
DIP & SOIC
http://www.national.com

1 page




CLC440 pdf
Figure 1 shows the noise model for the non-inverting
amplifier configuration. The model includes all of the
following noise sources:
Input voltage noise (en)
Input current noise (in = in+ = in-)
Thermal Voltage Noise (et) associated with each
external resistor
Rseq
4kTRseq *
en
*
* in+
+
CLC440
-
Rf
* in- Rg
*
4kTRf
Noise Figure vs. Source Resistance
25
Rs() NF Unterminated NF Terminated
50 12.03dB
17.90dB
20
ROPT
3.13dB
6.15dB
15 Terminated
10
Unterminated
5
Ropt = 2800
0 Ropt = 1400
10 100 1k 10k 100k
Source Resistance ()
Figure 2: Noise Figure vs. Source Resistance
* 4kTRg
Rseq = Rs for Unterminated Systems
Rseq = Rs II RT for Terminated Systems
Figure 1: Non-inverting Amplifier Noise Model
The total equivalent input noise density is calculated
by using the noise model shown. Equations 1 and 2
represent the noise equation and the resulting equation
for noise figure.
( ) ( )eni =
en2 + in2 Rseq2 +
RfIIRg
2
+
4kTRseq
+
4kT
RfIIRg
Equation 1: Noise Equation
( ) ( )NF
=
10LOG
en2
+
in2
Rseq2
+

RfIIRg
2
+ 4kTRseq
+ 4kT
RfIIRg
4kTRseq

Equation 2: Noise Figure Equation
The noise figure is related to the equivalent source
resistance (Rseq) and the parallel combination of Rf and
Rg. To minimize noise figure, the following steps are
recommended:
These boards were laid out for optimum, high-speed
performance. The ground plane was removed near the
input and output pins to reduce parasitic capacitance.
And all trace lengths were minimized to reduce series
inductances.
Supply bypassing is required for the amplifiers
performance. The bypass capacitors provide a low
impedance return current path at the supply pins. They
also provide high frequency filtering on the power supply
traces. 6.8µF tantalum, 0.01µF ceramic, and 500pF
ceramic capacitors are recommended on both supplies.
Place the 6.8µF capacitors within 0.75 inches of the
power pins, and the 0.01µF and 500pF capacitors less
than 0.1 inches from the power pins.
Dip sockets add parasitic capacitance and inductance
which can cause peaking in the frequency response and
overshoot in the time domain response. If sockets are
necessary, flush-mount socket pins are recommended.
The device holes in the 730055 evaluation board are
sized for Cambion P/N 450-2598 socket pins, or their
functional equivalent.
Applications Circuits
Minimize RfIIRg
Choose the optimum Rs (ROPT)
ROPT is the point at which the NF curve reaches a
minimum and is approximated by:
ROPT
en
in
Figure 2 is a plot of NF vs Rs with Rf = 0, Rg = (Av = +1).
The NF curves for both Unterminated and Terminated
systems are shown. The Terminated curve assumes Rs
= RT. The table indicates the NF for various source resis-
tances including Rs = ROPT.
Layout Considerations
A proper printed circuit layout is essential for achieving
high frequency performance. National provides
evaluation boards for the CLC440 (CLC730055-DIP,
CLC730060-SOIC) and suggests their use as a guide for
high frequency layout and as an aid in device testing and
characterization.
Transimpedance Amplifier
The low 2.5pA/Hz input current noise and unity gain
stability make the CLC440 an excellent choice for
transimpedance applications. Figure 3 illustrates a
low noise transimpedance amplifier that is commonly
implemented with photo diodes. Rf sets the transimped-
ance gain. The photo diode current multiplied by Rf
determines the output voltage.
Cf
Photo Diode
Representation
Iin Cd
Rf
-
CLC440
+
Vout
Vout = -Iin*Rf
Figure 3: Transimpedance Amplifier Configuration
5 http://www.national.com

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