CLC430 Datasheet PDF - National Semiconductor
| Part Number | CLC430 | |
| Description | General Purpose 100MHz Op Amp with Disable | |
| Manufacturers | National Semiconductor | |
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N
CLC430
General Purpose 100MHz Op Amp with Disable
June 1999
General Description
The CLC430 is a low-cost, wideband monolithic amplifier for general
purpose applications. The CLC430 utilizes National’s patented
current feedback circuit topology to provide an op amp with a slew rate
of 2000V/µs, 100MHz unity-gain bandwidth and fast output disable
function. Like all current feedback op amps, the CLC430 allows the
frequency response to be optimized (or adjusted) by the selection of
the feedback resistor. For demanding video applications, the 0.1dB
bandwidth to 20MHz and differential gain/phase of 0.03%/0.05° make
the CLC430 the preferred component for broadcast quality NTSC and
PAL video systems.
The large voltage swing (28Vpp), continuous output current (85mA)
and slew rate (2000V/µs) provide high-fidelity signal conditioning for
applications such as CCDs, transmission lines and low impedance
circuits. Even driving loads of 100Ω, the CLC430 provides very low
2nd and 3rd harmonic distortion at 1MHz (-76/-82dBc).
Features
s 0.1dB gain flatness to 20MHz (Av=+2)
s 100MHz bandwidth (Av=+1)
s 2000V/µs slew rate
s 0.03%/0.05° differential gain/phase
s ±5V, ±15V or single supplies
s 100ns disable to high-impedance output
s Wide gain range
s Low cost
Applications
s Video distribution
s CCD clock driver
s Multimedia systems
s DAC output buffers
s Imaging systems
Video distribution, multimedia and general purpose applications will
benefit from the CLC430’s wide bandwidth and disable feature. Power
is reduced and the output becomes a high impedance when disabled.
The wide gain range of the CLC430 makes this general purpose op
amp an improved solution for circuits such as active filters, differen-
tial-to-single-ended drivers, DAC transimpedance amplifiers and
MOSFET drivers.
Typical Application
CCD Clock Driver
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
Pinout
DIP & SOIC
http://www.national.com
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General Design Considerations
The CLC430 is a general purpose current-feedback ampli-
fier for use in a variety of small- and large-signal applica-
tions. Use the feedback resistor to fine tune the gain
flatness and -3dB bandwidth for any gain setting. Com-
linear provides information for the performance at a gain of
+2 for small and large signal bandwidths. The plots show
feedback resistor values for selected gains.
follows:
Vcc
Enable
±15V
>12.7V
±5V
>2.7V
Disable <10.0V
<0.8V
The amplifier is enabled with pin 8 left open due to the 2kΩ
pull-up resistor, shown in Fig. 1.
Gain
Use the following equations to set the CLC430's non-
inverting or inverting gain:
Non -Inverting Gain = 1+ Rf
Rg
Inverting Gain = - Rf
Rg
Choose the resistor values for non-inverting or inverting
gain by the following steps.
Vin
Rin
+
CLC430
-
Vout
Rs
Rf
Rg
Fig. 0 Component Identification
1) Select the recommended feedback resistor Rf (refer
to plot in the plot section entitled Rf vs Gain).
2) Choose the value of Rg to set gain.
3) Select Rs to set the circuit output impedance.
4) Select Rin for input impedance and input bias.
High Gains
Current feedback closed-loop bandwidth is independent of
gain-bandwidth-product for small gain changes. For larger
gain changes the optimum feedback register Rf is derived
by the following:
Rf = 724Ω − 60Ω ⋅ (Av )
As gain is increased, the feedback resistor allows bandwidth
to be held constant over a wide gain range. For a more
complete explanation refer to application note OA-25 Stabil-
ity Analysis of Current-Feedback Amplifiers.
Resistors have varying parasitics that affect circuit perfor-
mance in high-speed design. For best results, use leaded
metal-film resistors or surface mount resistors. A SPICE
model for the CLC430 is available to simulate overall
circuit performance.
Enable / Disable Function
The CLC430 amplifier features an enable/disable function
that changes the output and inverting input from low to high
impedance. The pin 8 enable/disable logic levels are as
2kΩ
8kΩ
Pin 8 DISABLE
+Vcc
To CLC430
Bias network
-Vcc
Fig. 1 Pin 8 Equivalent Disable Circuit
Open-collector or CMOS interfaces are recommended to
drive pin 8. The turn-on and off time depends on the speed
of the digital interface.
The equivalent output impedance when disabled is shown
in Fig. 2. With Rg connected to ground, the sum of Rf and
Rg dominates and reduces the disabled output imped-
ance. To raise the output impedance in the disabled state,
connect the CLC430 as a unity-gain voltage follower by
removing Rg. Current-feedback op-amps need the recom-
mended Rf in a unity-gain follower circuit. For high density
circuit layouts consider using the dual CLC431 (with
disable) or the dual CLC432 (without disable).
Equivalent Impedance
Vin +
in Disable
300kΩ
8pF
-
Vout
Rf
Rg
Fig. 2 Equivalent Disabled Output Impedance
2nd and 3rd Harmonic Distortion
To meet low distortion requirements, recognize the effect
of the feedback resistor. Increasing the feedback resistor
will decrease the loop gain and increase distortion. De-
creasing the load impedance increases 3rd harmonic
distortion more than 2nd.
Differential Gain and Differential Phase
The CLC430 has low DG and DP errors for video applica-
tions. Add an external pulldown resistor to the CLC430’s
output to improve DG and DP as seen in Fig.3. A 604Ω RP
will improve DG and DP to 0.01% and 0.02°.
5 http://www.national.com
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for CLC430 electronic component. |
| Information | Total 8 Pages | |
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