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Número de pieza CLC006AJE
Descripción Serial Digital Cable Driver with Adjustable Outputs
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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August 1998
CLC006
Serial Digital Cable Driver with Adjustable Outputs
General Description
National’s Comlinear CLC006 is a monolithic, high-speed
cable driver designed for the SMPTE 259M serial digital
video data transmission standard. The CLC006 drives 75
transmission lines (Belden 8281 or equivalent) at data rates
up to 400 Mbps. Controlled output rise and fall times (650 ps
typical) minimize transition-induced jitter. The output voltage
swing, typically 1.65V, set by an accurate, low-drift internal
bandgap reference, delivers an 800 mV swing to back-
matched and terminated 75cable. Output swing is adjust-
able from 0.7 Vp-p to 2 Vp-p using external resistors.
The CLC006’s class AB output stage consumes less power
than other designs, 185 mW with both outputs terminated,
and requires no external bias resistors. The differential in-
puts accept a wide range of digital signals from 200 mVp-p to
ECL levels within the specified common-mode limits. All this
make the CLC006 an excellent general purpose high speed
driver for digital applications.
The CLC006 is powered from a single +5V or −5.2V supply
and comes in an 8-pin SOIC package.
Applications
n Digital routers and distribution amplifiers
n Coaxial cable driver for digital transmission line
n Twisted pair driver
n Serial digital video interfaces for the commercial and
broadcast industry
n SMPTE, Sonet/SDH, and ATM compatible driver
n Buffer applications
Key Specifications
n 650 ps rise and fall times
n Data rates to 400 Mbps
n 200 mV differential input
n Low residual jitter (25 pspp )
Features
n No external pull-down resistors
n Adjustable output amplitude
n Differential input and output
n Low power dissipation
n Single +5V or −5.2V supply
n Replaces GS9008 in most applications
DS100084-1
Connection Diagram (8-Pin SOIC)
DS100084-3
Order Number CLC006AJE
See NS Package Number M08A
Typical Application
© 1998 National Semiconductor Corporation DS100084
DS100084-2
www.national.com

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CLC006AJE pdf
Operation (Continued)
FIGURE 7. Differential Input DC Coupled Output
DS100084-10
OUTPUT AMPLITUDE ADJUSTMENT
The high and low output levels of the CLC006 are set by a
circuit shown simplified in Figure 8. Output high and low lev-
els may be set independently with external resistor networks
connected between REXT-H (pin 3), REXT-L (pin 4) and the
power supplies. The resistor networks affect the high and
low output levels by changing the internally generated bias
voltages, VH and VL. The nominal high and low output levels
are VCC−1.7V and VCC−3.3V, respectively, when the pins
REXT-H and REXT-L are left unconnected. Though the internal
components which determine output voltage levels have ac-
curate ratios, their absolute values may be controlled only
within about ±15% of nominal. Even so, without external ad-
justment, output voltages are well controlled. A final design
should accommodate the variation in externally set output
voltages due to the CLC006’s part-to-part and external com-
ponent tolerances.
Output voltage swing may be reduced with the circuit shown
in Figure 9. A single resistance chosen with the aid of the
graph, Figure 10, is connected between pins 3 and 4. Output
voltage swing may be increased with the circuit of Figure 11.
Figure 12 is used to estimate a value for resistor R. Note that
both of these circuits and the accompanying graphs assume
that the CLC006 is loaded with the standard 150. Be aware
that output loading will affect the output swing and the high
and low levels. It may be necessary to empirically select re-
sistances used to set output levels when the D.C. loading on
the CLC006 differs appreciably from 150.
DS100084-11
FIGURE 8. Equivalent Bias Generation Circuit
5 www.national.com

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