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PDF ADAV4601 Data sheet ( Hoja de datos )

Número de pieza ADAV4601
Descripción Audio Processor
Fabricantes Analog Devices　
Logotipo Analog Devices Logotipo



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Audio Processor for Advanced TV
ADAV4601
FEATURES
Fully programmable 28-bit audio processor for enhanced
ATV sound—default audio processing flow loaded on reset
Implements Analog Devices, Inc. and third-party branded
audio algorithms
Adjustable digital delay line for audio/video
Synchronization for up to 200 ms stereo delay
High performance 24-bit ADC and DAC
94 dB DNR performance on DAC channels
95 dB DNR performance on ADC channels
Headphone output with integrated amplifiers
High performance pulse-width modulation (PWM) digital
outputs
Multichannel digital baseband I/O
4 stereo synchronous digital I2S input channels
One 6-channel sample rate converter (SRC) and one stereo
SRC supporting input sample rates from 5 kHz to 50 kHz
One stereo synchronous digital I2S output
S/PDIF output with S/PDIF input mux capability
Fast I2C control
Operates from 3.3 V (analog), 1.8 V (digital core), and 3.3 V
(digital interface)
Available in 80-lead LQFP
APPLICATIONS
General-purpose consumer audio post processing
Home audio
DVD recorders
Home theater in a box systems and DVD receivers
Audio processing subsystems for DTV-ready TVs
Analog broadcast capability for iDTVs
GENERAL DESCRIPTION
The ADAV4601 is an enhanced audio processor targeting
advanced TV applications with full support for digital and
analog baseband audio.
The audio processor, by default, loads a dedicated TV audio flow
that incorporates full matrix switching (any input to any output),
automatic volume control that compensates for volume changes
during advertisements or when switching channels, dynamic
bass, a multiband equalizer, and up to 200 ms of stereo delay
memory for audio-video synchronization.
Alternatively, Analog Devices offers an award-winning graphical
programming tool (SigmaStudio™) that allows custom flows to be
quickly developed and evaluated. This allows the creation of
customer-specific audio flows, including the use of ADI library of
third-party algorithms.
The analog I/O integrates Analog Devices proprietary continuous-
time, multibit Σ-Δ architecture to bring a higher level of
performance to ATV systems, required by third-party algorithm
providers to meet system branding certification. The analog input
is provided by 95 dB dynamic range (DNR) ADCs, and analog
output is provided by 94 dB DNR DACs.
The main speaker outputs can be supplied as a digitally modulated
PWM stream to support digital amplifiers.
The ADAV4601 includes multichannel digital inputs and outputs.
In addition, digital input channels can be routed through integrated
sample rate converters (SRC), which are capable of supporting any
arbitrary sample rate from 5 kHz to 50 kHz.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2009 Analog Devices, Inc. All rights reserved.

1 page




ADAV4601 pdf
ADAV4601
SPECIFICATIONS
AVDD = 3.3 V, DVDD = 1.8 V, ODVDD = 3.3 V, operating temperature = −40°C to +85°C, master clock 24.576 MHz, measurement
bandwidth = 20 Hz to 20 kHz, ADC input signal = DAC output signal = 1 kHz, unless otherwise noted.
PERFORMANCE PARAMETERS
Table 1.
Parameter
REFERENCE SECTION
Absolute Voltage VREF
VREF Temperature Coefficient
ADC SECTION
Number of Channels
Full-Scale Input Level
Resolution
Dynamic Range (Stereo Channel)
A-Weighted
Total Harmonic Distortion + Noise
(Stereo Channel)
Gain Mismatch
Crosstalk (Left-to-Right, Right-to-Left)
Gain Error
Current Setting Resistor (RISET)
Power Supply Rejection
ADC DIGITAL DECIMATOR FILTER
CHARACTERISTICS
Pass Band
Pass-Band Ripple
Stop Band
Stop-Band Attenuation
Group Delay
PWM SECTION
Frequency
Modulation Index
Dynamic Range
A-Weighted
Total Harmonic Distortion + Noise
DAC SECTION
Number of Auxiliary Output Channels
Resolution
Full-Scale Analog Output
Dynamic Range
A-Weighted
Total Harmonic Distortion + Noise
Crosstalk (Left-to-Right, Right-to-Left)
Interchannel Gain Mismatch
Gain Error
DC Bias
Power Supply Rejection
Output Impedance
Min Typ
1.53
100
2
100
24
95
−90
0.2
−110
−1
20
−87
Max
22.5
±0.0002
26.5
100
1040
384
0.976
98
−80
6
24
1
94
−86
−102
0.1
0.525
1.53
−90
235
Unit Test Conditions/Comments
V
ppm/°C
μA rms
Bits
One stereo channel
dB −60 dBFS with respect to full-scale analog input
dB −3 dBFS with respect to full-scale analog input
dB Left- and right-channel gain mismatch
dB
dB Input signal is 100 μA rms
kΩ External resistor to set current input range of ADC
for nominal 2.0 V rms input signal
dB 1 kHz, 300 mV p-p signal at AVDD
At 48 kHz, guaranteed by design
kHz
dB
kHz
dB
μs
kHz Guaranteed by design
Guaranteed by design
dB −60 dBFS with respect to full-scale code input
dB −3 dBFS with respect to full-scale code input
Bits
V rms
Three stereo channels
dB −60 dBFS with respect to full-scale code input
dB −3 dBFS with respect to full-scale code input
dB
dB Left- and right-channel gain mismatch
dB 1 V rms output
V
dB 1 kHz, 300 mV p-p signal at AVDD
Ω
Rev. B | Page 5 of 60

5 Page





ADAV4601 arduino
ADAV4601
Pin No.
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60, 61
62
63
64
65
66
67
68
69
70
71
72
73
74 to 77
78
79
80
Mnemonic
SPDIF_IN0/SDIN3
SPDIF_IN1/LRCLK0
SPDIF_IN2/BCLK0
ODGND
ODVDD
MCLK_OUT
DVDD
DGND
MCLKI/XIN
XOUT
SPDIF_IN4/BCLK1
SPDIF_IN3/LRCLK1
SDO0/AD0
SPDIF_OUT/SDO1
PWM_READY
DVDD
DGND
PWM1A
PWM1B
PWM2A
PWM2B
PWM3A
PWM3B
PWM4A
PWM4B
RESET
DVDD
DGND
AVDD
PLL_LF
AGND
AGND
HPOUT1L
HPOUT1R
AVDD
NC
AUXOUT3L
AUXOUT3R
AUXOUT4L
AUXOUT4R
NC
FILTD
AVDD
AGND
AGND
AVDD
AUXOUT1L
AUXOUT1R
NC
AUXIN1L
AUXIN1R
ISET
Description
External Input to S/PDIF Mux/SRC Data Input/Serial Data Input 3 (Default).
External Input to S/PDIF Mux/Left/Right Clock for SRC1 (Default).
External Input to S/PDIF Mux/Bit Clock for SRC1 (Default).
Digital Ground.
Digital Interface Supply (3.3 V).
Master Clock Output.
Digital Supply (1.8 V).
Digital Ground.
Master Clock/Crystal Input.
Crystal Output.
External Input to S/PDIF Mux/Bit Clock for Serial Data I/O (Default).
External Input to S/PDIF Mux/Left/Right Clock for Serial Data I/O (Default).
Serial Data Output. This pin acts as the I2C address select on reset. It has an internal pull-down resistor.
Output of S/PDIF Mux/Serial Data Output.
PWM Ready Flag.
Digital Supply (1.8 V).
Digital Ground.
Pulse-Width Modulated Output 1A.
Pulse-Width Modulated Output 1B.
Pulse-Width Modulated Output 2A.
Pulse-Width Modulated Output 2B.
Pulse-Width Modulated Output 3A.
Pulse-Width Modulated Output 3B.
Pulse-Width Modulated Output 4A.
Pulse-Width Modulated Output 4B.
Reset Analog and Digital Cores.
Digital Supply (1.8 V).
Digital Ground.
PLL Supply (3.3 V).
PLL Loop Filter.
PLL Ground.
Headphone Driver Ground.
Left Headphone Output.
Right Headphone Output.
Headphone Driver Supply (3.3 V).
No Connection to This Pin Allowed.
Left Auxiliary Output 3.
Right Auxiliary Output 3.
Left Auxiliary Output 4.
Right Auxiliary Output 4.
No Connection to This Pin Allowed.
DAC Filter Capacitor.
DAC Supply (3.3 V).
DAC Ground.
DAC Ground.
DAC Supply (3.3 V).
Left Auxiliary Output 1.
Right Auxiliary Output 1.
No Connection to This Pin Allowed.
Left Auxiliary Input 1.
Right Auxiliary Input 1.
ADC Current Setting.
Rev. B | Page 11 of 60

11 Page







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