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PDF ADL5205 Data sheet ( Hoja de datos )
| Número de pieza | ADL5205 | |
| Descripción | 1 dB Step Size DGA | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
Dual, 35 dB Range, 1 dB Step Size DGA
ADL5205
FEATURES
Dual, independent, digitally controlled gain amplifier (DGA)
−9 dB to +26 dB gain range
1 dB step size, ±0.2 dB accuracy at 200 MHz
100 Ω differential input resistance
10 Ω differential output resistance
1.2 dB change in noise figure for first 12 dB of gain reduction
Output third-order intercept (OIP3): 48.5 dBm at 200 MHz, 5 V,
high performance mode
−3 dB bandwidth: 1700 MHz typical in high performance
mode
Multiple control interface options
Parallel 6-bit control interface with latch
Serial peripheral interface (SPI) with fast attack
Gain step up/down interface
Wide input dynamic range
Low power mode
Power-down control
Single 3.3 V or 5 V supply operation
40-lead, 6 mm × 6 mm LFCSP package
APPLICATIONS
Differential analog-to-digital converter (ADC) drivers
High intermediate frequency (IF) sampling receivers
High output power IF amplification
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
SIDE A
SPI WITH FA,
PARALLEL WITH LATCH,
UP/DOWN
PWUPA
VPOS
LOGIC
VINA+
0dB TO 23dB
100Ω
VINA–
MODE0
MODE1
PM
CONTROL
CIRCUITRY
14dB
TO
26dB
VOUTA–
10Ω
VOUTA+
VINB+
0dB TO 23dB
100Ω
VINB–
14dB
TO
26dB
VOUTB–
10Ω
VOUTB+
LOGIC
ADL5205
SIDE B
PWUPB
SPI WITH FA,
PARALLEL WITH LATCH,
UP/DOWN
Figure 1.
GND
GENERAL DESCRIPTION
The ADL5205 is a digitally controlled, wide bandwidth, variable
gain dual amplifier (DGA) that provides precise gain control, high
output third-order intercept (OIP3) and a near constant noise
figure for the first 12 dB of attenuation. The excellent OIP3
performance of 48.5 dBm (at 200 MHz, 5 V, high performance
mode, and maximum gain) makes the ADL5205 an excellent
gain control device for a variety of receiver applications.
For wide input dynamic range applications, the ADL5205
provides a broad 35 dB gain range with a 1 dB step size. The
gain is adjustable through multiple gain control and interface
options: parallel, SPI, or gain step up/down control.
The two channels of the ADL5205 can be powered up
independently by applying the appropriate logic level to the
PWUPA and PWUPB pins. The quiescent current of the ADL5205
is typically 175 mA for high performance mode and 135 mA for
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
low power mode. When disabled, the ADL5205 consumes only
14 mA and offers excellent input to output isolation. The gain
setting is preserved when the device is disabled.
Fabricated on the Analog Devices, Inc., high speed, silicon
germanium (SiGe) complementary BiCMOS process, the
ADL5205 provides precise gain adjustment capabilities with good
distortion performance. The ADL5205 amplifier comes in a
compact, thermally enhanced, 6 mm × 6 mm, 40-lead LFCSP
package and operates over the temperature range of −40°C to
+85°C.
Note that throughout this data sheet, multifunction pins, such
as CSA/A3, are referred to by the entire pin name or by a single
function of the pin, for example, CSA, when only that function
is relevant.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
TIMING SPECIFICATIONS
Table 2. SPI Timing Parameters
Parameter
CSA or CSB to SCLK Setup Time
SDIO to SCLK Setup Time
SCLK to SDIO Hold Time
SCLK Pulse Width
SCLK Cycle Time
SCLK to CSA or CSB Setup Time
SCLK to SDIO Output Valid Delay
ADL5205
Symbol
tCS
tDS
tDH
tPW
tSCLK
tCH
tDV
Min Typ Max Unit Test Conditions/Comments
20 ns
10 ns
10 ns
25 ns
50 ns
10 ns
20 ns During readback
Timing Diagrams
SCLK
___ ___
CSA, CSB
tCS
tSCLK
tPW
tDV
tCH
tDS tDH
SDIO
DNC DNC DNC DNC DNC DNC DNC R/W FA1 FA0 D5 D4 D3 D2 D1 D0
Figure 2. SPI Interface Read/Write Mode Timing Diagram
UPDN_DAT_x
UPDN_CLK_x
tDS tDS
tPW
UP
tDS
DOWN
RESET
tDH
Figure 3. Up/Down Gain Control Timing Diagram
tDH
LATCHA,
LATCHB
A5 TO A0
B5 TO B0
tDH
Figure 4. Parallel Mode Timing Diagram
Rev. 0 | Page 5 of 31
5 Page 
Data Sheet
0
5V, 26dB
5V, 14dB
5V, 6dB
–20 3.3V, 26dB
3.3V, 14dB
3.3V, 6dB
–40
–60
–80
–100
–120
0
100 200 300 400
FREQUENCY (MHz)
500
Figure 18. Second Harmonic Distortion (HD2) vs. Frequency over VPOS for Three
Gain Codes at 2 V p-p Composite, Low Power Mode
0
5V, +85°C
5V, +25°C
5V, –40°C
–20 3.3V, +85°C
3.3V, +25°C
3.3V, –40°C
–40
–60
–80
–100
–120
0
100 200 300 400 500
FREQUENCY (MHz)
Figure 19. Second Harmonic Distortion (HD2) vs. Frequency over VPOS for Three
Temperatures at Maximum Gain, 2 V p-p Composite, Low Power Mode
0
5V, 26dB
5V, 14dB
5V, 6dB
–20 3.3V, 26dB
3.3V, 14dB
3.3V, 6dB
–40
–60
–80
–100
–120
0
100 200 300 400
FREQUENCY (MHz)
500
Figure 20. Third Harmonic Distortion (HD3) vs. Frequency over VPOS for Three Gain
Codes at 2 V p-p Composite, High Performance Mode
ADL5205
0
5V, +85°C
5V, +25°C
–20
5V, –40°C
3.3V, +85°C
3.3V, +25°C
3.3V, –40°C
–40
–60
–80
–100
–120
0
100 200 300 400
FREQUENCY (MHz)
500
Figure 21. Third Harmonic Distortion (HD3) vs. Frequency vs. VPOS for Three
Temperatures at Maximum Gain, 2 V p-p Composite, High Performance Mode
0
5V, 26dB
5V, 14dB
5V, 6dB
–20 3.3V, 26dB
3.3V, 14dB
3.3V, 6dB
–40
–60
–80
–100
–120
0
100 200 300 400 500
FREQUENCY (MHz)
Figure 22. Third Harmonic Distortion (HD3) vs. Frequency over VPOS for Three Gain
Codes at 2 V p-p Composite, Low Power Mode
0
5V, +85°C
5V, +25°C
5V, –40°C
–20 3.3V, +85°C
3.3V, +25°C
3.3V, –40°C
–40
–60
–80
–100
–120
0
100 200 300 400
FREQUENCY (MHz)
500
Figure 23. Third Harmonic Distortion (HD3) vs. Frequency over VPOS for Three
Temperatures at Maximum Gain, 2 V p-p Composite, Low Power Mode
Rev. 0 | Page 11 of 31
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADL5205.PDF ] | |
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