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Teilenummer | WM0011 |
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Beschreibung | General Purpose Low-Power Audio DSP | |
Hersteller | Wolfson Microelectronics | |
Logo | ||
Gesamt 30 Seiten w
WM0011
General Purpose Low-Power Audio DSP
DESCRIPTION
WM0011 Audio DSP provides Wolfson HD audio quality,
with a power-budget targeted at handheld battery-powered
audio devices.
WM0011 combines the advanced Tensilica HiFi EP™ audio
DSP with an I/O and peripheral set optimized for flexible
integration into smartphones, tablets and other portable
consumer electronics devices. WM0011 is ideal for
extremely power-efficient implementations of advanced
voice enhancement, telephony noise reduction, voice and
music CODECs and general audio enhancement.
A very wide range of audio CODECs, voice CODECs and
third-party algorithms from such companies as Waves
Audio, SRS Labs and Dolby are available, providing a rich
portfolio of audio-processing options that can be integrated
into a device with no additional software development.
WM0011 comes in a space-saving 3x3mm 49-ball W-CSP
package with 0.4mm pitch.
APPLICATIONS
Wireless audio devices – headsets, microphones,
speakerphones
Portable media devices
Automotive
General purpose digital signal processor for consumer
audio applications
Smartphones
FEATURES
260MHz Tensilica HiFi EP™ 24-bit audio digital signal
processor
- C-programmable with advanced debugging and
profiling tool set
- 256kB local RAM memory
- 36kB Instruction / Data cache memory
- 384kB general-purpose system RAM
- Flexible boot options with 32kB boot ROM
- 32 Channel DMA
- XTAL or CMOS clock input
- Low-power programmable PLL
Security
- Support for HW Authentication
- Random Number Generator (RNG) to assist security
algorithms
Peripherals
- SPI Master / Slave interface
- 3 x multi-channel AIF interfaces, including I2S and TDM
- UART
- I2C Master
- I2C Slave
- 3 x 32-bit general-purpose timer modules
- Watchdog timer
- On-chip JTAG debug unit and trace buffer
- GPIO
Software-defined standby modes for extended battery life
WOLFSON MICROELECTRONICS plc
Production Data, August 2013, Rev 4.1
Copyright 2013 Wolfson Microelectronics plc
WM0011
Production Data
LEVEL/EDGE INTERRUPT CONTROL...............................................................................................................125
IRQC MODULE INTERRUPTS............................................................................................................................126
IRQC MODULE REGISTER MAP .......................................................................................................................128
IRQC_OUT – IRQ OUTPUT REGISTER .............................................................................................................128
IRQC_IN – IRQ INPUT REGISTER.....................................................................................................................129
IRQC_DIR – IRQ DIRECTION REGISTER .........................................................................................................129
IRQC_INV – IRQ INVERSION REGISTER..........................................................................................................130
EDGE DETECTION .............................................................................................................................................131
IRQC_EDGE0 – IRQ EDGE DETECTION 0 REGISTER ....................................................................................132
IRQC_EDGE1 – IRQ EDGE DETECTION 1 REGISTER ....................................................................................132
IRQC_INT_CTRL – IRQ INTERRUPT CONTROL REGISTER ...........................................................................133
IRQC_INT_CLR – IRQ INTERRUPT CLEAR REGISTER ...................................................................................134
IRQC_IRQ_MSK – IRQ INTERRUPT MASK REGISTER....................................................................................134
IRQC_IRQ_VECT – IRQ INTERRUPT VECTOR REGISTER .............................................................................136
IRQC_IRQ_STS – IRQ INTERRUPT STATUS REGISTER ................................................................................136
IRQC_FIRQ_MSK – IRQ FAST INTERRUPT MASK REGISTER .......................................................................137
IRQC_FIRQ_VECT – IRQ FAST INTERRUPT VECTOR REGISTER.................................................................139
IRQC_FIRQ_STS – IRQ FAST INTERRUPT STATUS REGISTER ....................................................................140
TRAX TRACE BUFFER MODULE.........................................................................................141
TRAX REGISTER MAP .......................................................................................................................................141
TRAX_CONFIG – TRAX TRACE BUFFER CONFIGURATION REGISTER .......................................................142
TRAX_CTRL – TRAX CONTROL REGISTER.....................................................................................................142
TRAX_STS – TRAX STATUS REGISTER ..........................................................................................................144
TRAX_DATA – TRAX DATA REGISTER ............................................................................................................145
TRAX_ADDR – TRAX ADDRESS REGISTER ....................................................................................................145
TRAX_TRIG_PC – TRAX PC MATCH TRIGGER REGISTER ............................................................................146
TRAX_PC_MATCH – TRAX PC MATCH CONTROL REGISTER.......................................................................147
TRAX_DLY_CNT – TRAX POST-TRIGGER DELAY COUNT REGISTER..........................................................148
WATCHDOG TIMER (WDT) MODULE ..................................................................................149
WATCHDOG DESCRIPTION ..............................................................................................................................149
WATCHDOG TIMER INTERRUPT ......................................................................................................................149
WATCHDOG REGISTER MAP ...........................................................................................................................149
WDT_CTRL – WATCHDOG CONTROL REGISTER ..........................................................................................150
WDT_CNT_RESTART – WATCHDOG COUNTER RESTART REGISTER........................................................150
WDT_MAX_CNT – WATCHDOG MAXIMUM COUNT REGISTER .....................................................................150
WDT_CUR_CNT – WATCHDOG CURRENT COUNT REGISTER.....................................................................151
WDT_RST_LEN – WATCHDOG RESET PULSE LENGTH REGISTER .............................................................151
UART MODULE .....................................................................................................................152
UART FEATURES ...............................................................................................................................................152
UART INTERRUPTS ...........................................................................................................................................152
UART REGISTER MAP .......................................................................................................................................153
UART_DAT - UART DATA REGISTER ...............................................................................................................153
UART_INT_CTRL - UART INTERRUPT CONTROL REGISTER........................................................................153
UART_FIFO_CTRL - UART FIFO CONTROL REGISTER..................................................................................154
UART_INT_STATUS - UART INTERRUPT STATUS REGISTER ......................................................................155
UART_LINE_CTRL - UART LINE CONTROL REGISTER ..................................................................................156
UART_LOOPBACK_CTRL - UART LOOPBACK CONTROL REGISTER...........................................................156
UART_LINE_STS - UART LINE STATUS REGISTER ........................................................................................157
UART_BAUD_LSW - UART BAUD LSW REGISTER..........................................................................................158
UART_BAUD_MSW - UART BAUD MSW REGISTER........................................................................................158
SERIAL PERIPHERAL INTERFACE (SPI) MODULE ............................................................159
SPI FEATURES...................................................................................................................................................159
SPI MASTER MODE ...........................................................................................................................................159
SPI SLAVE MODE...............................................................................................................................................159
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PD, Rev 4.1, August 2013
6
6 Page WM0011
Production Data
PIN NAME
NO
F7 AIF1LRCLK
G7 AIF1BCLK
G5 AIF2TXDAT
F5 AIF2RXDAT
E4 AIF2LRCLK
F4 AIF2BCLK
B5 AIF3TXDAT/SPIMOSI/GPIO18
B6 AIF3RXDAT/SPIMISO/GPIO19
B4 AIF3LRCLK/S¯¯P¯IS¯S¯ /GPIO17
B7 AIF3BCLK/SPISCLK
DEFAULT FUNCTION / RESET CONDITION
(FUSES NOT PROGRAMMED)
AIF1LRCLK
AIF1BCLK
AIF2TXDAT
AIF2RXDAT
AIF2LRCLK
AIF2BCLK
SPIMOSI
SPIMISO
S¯¯P¯IS¯S¯
input
input
output
input
input
input
output
input
output
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-up enabled
SPISCLK
output
Pull-down enabled
F3 UARTRX/SDA1/SDA2/GPIO22
UARTRX
input
G3 UARTTX/SCLK1/SCLK2/GPIO23
UARTTX
output
F1 GPIO4
F2 GPIO5
D3 GPIO6
E2 GPIO7
D2 GPIO8
E1 GPIO9
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
input/output
input/output
input/output
input/output
input/output
input/output
B3 GPIO10
[Disabled]
input/output
C2 GPIO11
[Disabled]
C3 GPIO12
[Disabled]
A3 GPIO13
[Disabled]
B2 GPIO14
[Disabled]
C4 TCK
TCK
A6
TDEBUG/TMSDEBUG
TDEBUG/TMSDEBUG
C7 TDI
TDI
C6 TDO
TDO
C5 TMSDFT
TMSDFT
A7 ¯T¯O¯C¯D¯¯R¯S¯T¯
¯T¯O¯C¯D¯¯R¯S¯T¯
D5 ¯T¯R¯S¯T¯
¯T¯R¯S¯T¯
Table 1 Default Pin Conditions (assuming Fuses are not programmed)
input/output
input/output
input/output
input/output
input
input
output
input
input
input
Pull-down enabled
Pull-down enabled whilst R¯¯E¯S¯E¯T¯
is asserted. Pull-down is disabled
after R¯¯E¯S¯E¯T¯ is released.
UARTTX is then actively driven.
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled whilst R¯¯E¯S¯E¯T¯
is asserted. Pull-up is enabled
after R¯¯E¯S¯E¯T¯ is released.
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-down enabled
Pull-up enabled
Pull-up enabled
Pull-up enabled
Pull-down enabled
Pull-up enabled
Pull-up enabled
Pull-down enabled
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PD, Rev 4.1, August 2013
12
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ WM0011 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
WM0011 | General Purpose Low-Power Audio DSP | Wolfson Microelectronics |
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