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PDF R7780A Data sheet ( Hoja de datos )
| Número de pieza | R7780A | |
| Descripción | Burst Triple Mode PWM Controller | |
| Fabricantes | Richtek Technology | |
| Logotipo |  |
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®
R7780A
Burst Triple Mode PWM Controller with Integrated HV
Start-up Device for Zero Power Monitor Application
General Description
The R7780A is a high-performance current mode PWM
controller with integrated HV start-up device inside. During
start-up, a current source through integrated HV device to
charge VDD capacitor for quick start-up while it dissipates
no loss in normal operation.
The R7780A provides users a superior AC/DC power
application of higher efficiency, few external component
count, and low cost solution. It features frequency jitter,
Under Voltage LockOut (UVLO), Leading Edge Blanking
(LEB), internal slope compensation in the tiny SOP-7
package, and offers complete protection coverage with Over
Temperature Protection (OTP), Over Load Protection (OLP)
and Over Voltage Protection (OVP).
Ordering Information
R7780A
Package Type
S : SOP-7
N : DIP-8
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
R7780AGS
R7780A
GSYMDNN
R7780AGS : Product Number
YMDNN : Date Code
Features
Integrated HV Start-up Device
UVLO: 9V/16.5V
Current Mode Control
Built-in 65kHz Operation Frequency
Built-in Jittering Frequency
Internal PWM Leading Edge Blanking
Internal Slope Compensation
Compensated Burst Triple Mode PWM
Cycle-by-Cycle Current Limit
Internal Auto Recovery OVP
Internal Auto Recovery OLP
Internal Auto Recovery OTP
CS Pin Open Protection
Secondary Rectifier Short Protection
Soft Driving for Reducing EMI Noise
High Noise Immunity
RoHS Compliant and Halogen Free
Applications
Switching AC/DC Adaptor
TV and Monitor Application
Low Standby Power Home Appliance
Pin Configurations
(TOP VIEW)
NC
COMP
CS
GND
2
3
4
7 HV
6 VDD
5 GATE
SOP-7
HV NC VDD GATE
R7780AGN
RichTek
R7780A
GNYMDNN
R7780AGN : Product Number
YMDNN : Date Code
Copyright ©2014 Richtek Technology Corporation. All rights reserved.
R7780A-01 August 2014
87
65
2 34
NC COMP CS GND
DIP-8
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
1 page  
R7780A
Parameter
Oscillator Section
Normal PWM Frequency
Maximum Duty Cycle
PWM Frequency Jitter Range
PWM Frequency Jitter Period
Frequency Variation Versus VDD
Frequency Variation Versus
Temperature
COMP Input Section
Open-Loop Voltage
COMP Open 56ms Protection
COMP Open-Loop Protection
Delay Time
Short Circuit COMP Current
Current-Sense Section
Initial Current Limit Offset
Maximum Current Limit
Leading Edge Blanking Time
Internal Propagation Delay Time
Minimum On Time
GATE Section
Gate Output Clamping Voltage
Rising Time
Falling Time
Symbol
Test Conditions
Min Typ Max Unit
fOSC
DMAX
f
TJIT
fDV
fDT
For 65kHz
VDD = 12V to 25V
60 65 70 kHz
70 75 80 %
-- 7 -- %
-- 4 -- ms
-- -- 2 %
TA = 30°C to 105°C (Note 5) -- -- 5 %
VCOMP_OP COMP pin open
VCOMP_56
tOLP
IZERO
VCOMP = 0V
VCSTH
VCS(MAX)
tLEB
tPD
tON (MIN)
(Note 5)
(Note 6)
(Note 6)
VCLAM P
tR
tF
VDD = 25V
CL = 1nF
CL = 1nF
5.5
5.25
--
--
5.75
--
56
272
6
--
--
400
V
V
ms
A
0.62 0.65 0.68
0.67 0.77 0.87
150 250 350
-- 100 --
250 350 450
V
V
ns
ns
ns
-- 14 --
-- 125 --
-- 45 --
V
ns
ns
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured in natural convection (still air) at TA = 25°C with the component mounted on a low effective single layer
thermal conductivity test board of JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by design.
Note 6. Leading edge blanking time and internal propagation delay time are guaranteed by design.
Copyright ©2014 Richtek Technology Corporation. All rights reserved.
R7780A-01 August 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
5 Page 
R7780A
Secondary Rectifier Short
VDD
VCOMP
VCS
Figure 2. Secondary Rectifier Short Protection
Negative Voltage Spike on Each Pin
Negative voltage (< −0.3V) on each pin will cause substrate
injection. It leads to controller damage or circuit false
trigger. Generally, it happens at CS pin due to negative
spike because of improper layout or inductive current
sense resistor. Therefore, it is highly recommended to
add a R-C filter to avoid CS pin damage, as shown in
Figure 3. Proper layout and careful circuit design should
be done to guarantee yield rate in mass production.
AC Mains
(90V to 265V)
#
HV
VDD
R7780A
GATE
CS
#
R-C Filter
Figure 3. R-C Filter on CS Pin
Layout Considerations
A proper PCB layout can abate unknown noise interference
and EMI issue in the switching power supply. Please refer
to the guidelines when you want to design PCB layout for
switching power supply :
The current path(1) from bulk capacitor, transformer,
MOSFET, Rcs return to bulk capacitor is a huge high
frequency current loop. The path(2) from gate pin,
MOSFET, Rcs return to bulk capacitor is also a huge
high frequency current loop. They must be as short as
possible to decrease noise coupling and kept a space
to other low voltage traces, such as IC control circuit
paths, especially. Besides, the path(3) between
MOSFET ground(b) and IC ground(d) is recommend to
be as short as possible, too.
The path(4) from RCD snubber circuit to MOSFET is a
high switching loop. Keep it as small as possible.
It is good for reducing noise, output ripple and EMI issue
to separate ground traces of bulk capacitor(a),
MOSFET(b), auxiliary winding(c) and IC control circuit
(d). Finally, connect them together on bulk capacitor
ground(a). The areas of these ground traces should be
kept large.
Placing bypass capacitor for abating noise on IC is highly
recommended. The bypass capacitor should be placed
as close to controller as possible.
To minimize reflected trace inductance and EMI minimize
the area of the loop connecting the secondary winding,
the output diode, and the output filter capacitor. In
addition, apply sufficient copper area at the anode and
cathode terminal of the diode for heatsinking. Apply a
larger area at the quiet cathode terminal. A large anode
area can increase high-frequency radiated EMI.
Copyright ©2014 Richtek Technology Corporation. All rights reserved.
R7780A-01 August 2014
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
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| PDF Descargar | [ Datasheet R7780A.PDF ] | |
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